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參數(shù)資料
| 型號(hào)： | Z8913820FSC |
| 廠商： | ZILOG INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 8-BIT, 20.48 MHz, MIXED DSP, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁(yè)數(shù)： | 17/65頁(yè) |
| 文件大?。?/td> | 2054K |
| 代理商： | Z8913820FSC |
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Z89138/Z89139
Voice Processing Controllers
Zilog
24
P R E L I M I N A R Y
DS97TAD0201
PIN FUNCTIONS (Continued)
Port 1 (P17-P10). Port 1 is an 8-bit, bidirectional, CMOS
compatible port (Figure 12). It has multiplexed Address
(A7-A0) and Data (D7-D0) ports. These eight I/O lines are
programmed as inputs or outputs, or can be configured un-
der software control as an Address/Data port for interfac-
ing external memory. The input buffers are Schmitt-trig-
gered and the output drivers are push-pull.
Port 1 can be placed under handshake control. In this con-
figuration, Port 3, lines P33 and P34 are used as the hand-
shake controls RDY1 and /DAV1 (Ready and Data Avail-
able). Memory locations greater than 24575 (Z89138) (in
ROM mode) are referenced through Port 1. To interface
external memory, Port 1 must be programmed for the mul-
tiplexed Address/Data mode. If more than 256 external lo-
cations are required, Port 0 outputs the additional lines.
Port 1 can be placed in the high-impedance state along
with Port 0, /AS, /DS, and R//W, allowing the Z89138/139
to share common resources in multiprocessor and DMA
applications.
Figure 12. Port 1 Conguration
OEN
Out
In
Pad
Auto Latch
Handshake Controls
/DAV2 and RDY2
(P31 and P36)
Z89138/139
MCU
R = 500 k
1.5
2.3V Hysteresis
Port 1
(I/O or AD7 - AD0)
8
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z8913829ASC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| Z8913829FSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| Z89139 | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Voice Processing Controllers |
| Z8913920ASC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| Z8913920FSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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