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參數(shù)資料
| 型號： | Z8913820FSC |
| 廠商： | ZILOG INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 8-BIT, 20.48 MHz, MIXED DSP, PQFP100 |
| 封裝： | QFP-100 |
| 文件頁數(shù)： | 28/65頁 |
| 文件大?。?/td> | 2054K |
| 代理商： | Z8913820FSC |
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Z89138/Z89139
Voice Processing Controllers
Zilog
34
P R E L I M I N A R Y
DS97TAD0201
Z8 MCU FUNCTIONAL DESCRIPTION (Continued)
When more than one interrupt is pending, priorities are re-
solved by a programmable priority encoder controlled by
the Interrupt Priority Register. An interrupt machine cycle
is activated when an interrupt request is granted. This dis-
ables all subsequent interrupts, pushes the Program
Counter and Status Flags to the stack, and then branches
to the program memory vector location reserved for that in-
terrupt.
All Z8 interrupts are vectored through locations in the pro-
gram memory. This memory location and the next byte
contain the 16-bit address of the interrupt service routine
for that particular interrupt request. To accommodate
polled interrupt systems, interrupt inputs are masked and
the Interrupt Request Register can be polled to determine
which of the interrupt requests needs service.
An interrupt resulting from AN1 is mapped into IRQ2, and
an interrupt from AN2 is mapped into IRQ0. Interrupts
IRQ2 and IRQ0 can be rising, falling or both edge trig-
gered, and are programmable by the user. The software
can poll to identify the state of the pin.
Programming bits for the Interrupt Edge Select are located
in the IRQ Register (R250), bits D7 and D6 . The configu-
ration is shown in Table 7.
Clock. The Z89138/139 on-chip oscillator has a high-gain,
parallel-resonant amplifier for connection to a crystal, LC,
ceramic resonator, or any suitable external clock source
(XTAL1 = Input, XTAL2 = Output). The crystal should be
AT cut, 20.48 MHz maximum, with a series resistance
(RS) less than or equal to 100 Ohms. The system clock
(SCLK) is one half the crystal frequency.
The crystal is connected across XTAL1 and XTAL2 using
capacitors from each pin to Ground (Figure 23).
Table 6. Interrupt Types, Sources, and Vectors
Name
Source
Vector Location
Comments
IRQ0
/DAV0, P32, AN2
0, 1
External (P32), Programmable Rise or Fall Edge Triggered
IRQ1
/DAV1, P33
2, 3
External (P33), Fall Edge Triggered
IRQ2
/DAV2, P31, TIN, AN2
4, 5
External (P31), Programmable Rise or Fall Edge Triggered
IRQ3
6, 7
Internal (DSP activated), Fall Edge Triggered
IRQ4
T0
8, 9
Internal
IRQ5
TI
10, 11
Internal
Table 7. IRQ Register
IRQ
Interrupt Edge
D7
D6
P31
P32
00
F
01
F
R
10
R
F
1
R/F
Notes:
F = Falling Edge
R = Rising Edge
Figure 23. Oscillator Conguration
XTAL1
XTAL2
C1
C2
C1
C2
XTAL1
XTAL2
XTAL1
XTAL2
Ceramic Resonator or
Crystal
LC
External Clock
L
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相關(guān)代理商/技術(shù)參數(shù) |
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| Z8913829ASC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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| Z8913920FSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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