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參數(shù)資料
| 型號： | ZL30121GGG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH Low Jitter System Synchronizer |
| 中文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PBGA100 |
| 封裝： | 9 X 9 MM, 0.80 MM PITCH, CABGA-100 |
| 文件頁數(shù)： | 14/30頁 |
| 文件大?。?/td> | 326K |
| 代理商： | ZL30121GGG |
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ZL30121
Data Sheet
14
Zarlink Semiconductor Inc.
In addition to the reference inputs, DPLL1 has three optional frame pulse synchronization inputs (
sync0
to
sync2
)
used to align the output frame pulses. The sync
n
input is selected with its corresponding ref
n
input, where n = 0, 1,
or 2. Note that the sync input cannot be used to synchronize the DPLL, it only determines the alignment of the
frame pulse outputs. An example of output frame pulse alignment is shown in Figure 4.
Figure 4 - Output Frame Pulse Alignment
Each of the
sync
inputs accept a single-ended LVCMOS frame pulse. Since alignment is determined from the rising
edge of the frame pulse, there is no duty cycle restriction on this input, but there is a minimum pulse width
requirement of 5 ns. Frequency detection for the sync inputs is automatic for the supported frame pulse frequencies
shown in Table 3.
166.67 Hz
(48x 125
μ
s frames)
400 Hz
1 kHz
2 kHz
8 kHz
64 kHz
Table 3 - Set of Pre-Defined Auto-Detect Sync Frequencies
ref
n
diff
x
/sdh_clk
x
/p0_clk
x
/p1_clk
x
sdh_fp
x
/p0_fp
x
Without a frame pulse
signal at the sync
input, the output
frame pulses will align
to any arbitrary cycle
of its associated
output clock.
sync
n
- no frame pulse signal present
When a frame pulse
signal is present at
the sync input, the
DPLL will align the
output frame pulses
to the output clock
edge that is aligned
to the input frame
pulse.
ref
n
sync
n
n = 0, 1, 2
x = 0, 1
n = 0, 1, 2
x = 0, 1
diff
x
/sdh_clk
x
/p0_clk
x
/p1_clk
x
sdh_fp
x
/p0_fp
x
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ZL30121GGG2 | 制造商:Microsemi Corporation 功能描述:PB FREE LOW JITTER SYSTEM SYNCHRONIZER |
| ZL30121GGG2V2 | 制造商:Microsemi Corporation 功能描述:REV 2 PB FREE LOW JITTER SYSTEM SYNCHRO 制造商:Microsemi Corporation 功能描述:REV 2 PB FREE LOW JITTER SYSTEM SYNCHRO - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SONET/SDH SYNCH 100CABGA 制造商:Microsemi Corporation 功能描述:IC SONET/SDH SYNCH 100CABGA |
| ZL30121GGGV2 | 制造商:Microsemi Corporation 功能描述:LOW JITTER SYSTEM SYNCHRONIZER 制造商:Microsemi Corporation 功能描述:REV 2 LOW JITTER SYSTEM SYNCHRONIZER - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC SONET/SDH SYNCH 100CABGA 制造商:Microsemi Corporation 功能描述:IC SONET/SDH SYNCH 100CABGA |
| ZL30122 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH Low Jitter Line Card Synchronizer |
| ZL30122GGG | 制造商:Microsemi Corporation 功能描述:LOW JITTER SYSTEM SYNCHRONIZER 制造商:Microsemi Corporation 功能描述:SONET/SDH LOW JITTER LINE CARD SYNCHRONIZER 64CABGA - Trays 制造商:Microsemi Corporation 功能描述:IC SONET/SDH SYNCH 64CABGA |
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