參數(shù)資料
型號: ZL30121GGG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: SONET/SDH Low Jitter System Synchronizer
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PBGA100
封裝: 9 X 9 MM, 0.80 MM PITCH, CABGA-100
文件頁數(shù): 20/30頁
文件大?。?/td> 326K
代理商: ZL30121GGG
ZL30121
Data Sheet
20
Zarlink Semiconductor Inc.
1.8 External Feedback Inputs
In addition to the static delay compensation described in the “External Feedback Inputs” section on page 20, the
ZL30121 also provides the option of dynamic delay compensation to minimize path delay variation associated with
external clock drivers and long PCB traces. This is accomplished by re-directing the internal DPLL1 feedback path
to external pins and closing the loop externally as shown in Figure 9.
Figure 9 - External Feedback Configuration
Feedback
Synthesizer
fb_clk
ext_fb_clk
ext_fb_fp
fb_clk
fb_fp
fb_fp
DPLL1
SONET/P0/P1
Synthesizers
clk
fp
ref
sync
Path Delay
clk_in
fp_in
clk_out
fp_out
clk_in
fp_in
clk_out
fp_out
ZL30121
realignment of input and output clocks
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