參數(shù)資料
型號： ZL50015
廠商： Zarlink Semiconductor Inc.
英文描述： Enhanced 1 K Digital Switch with Stratum 4E DPLL
中文描述： 增強1K的數(shù)字交換與地層4E條數(shù)字鎖相環(huán)
文件頁數(shù)： 110/122頁
文件大?。?/td> 926K
代理商： ZL50015
ZL50015
Data Sheet
110
Zarlink Semiconductor Inc.
Figure 44 - FPo2 and CKo2 or FPo3 and CKo3 (16.384 MHz) Timing Diagram
Characteristics are over recommended operating conditions unless otherwise stated.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
Characteristics are over recommended operating conditions unless otherwise stated.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
AC Electrical Characteristics
-
FPo2 and CKo2 or FPo3 and CKo3 (16.384 MHz) Timing (Master Mode, Divided Slave Mode, or
Multiplied Slave Mode with less than 10 ns of Cycle to Cycle Variation on CKi)
Characteristic
Sym.
Min.
Typ.
Max.
Units
Notes
1
2
FPo2 Output Pulse Width
FPo2 Output Delay from the FPo2 falling edge
to the output frame boundary
FPo2 Output Delay from the output frame
boundary to the FPo2 rising edge
CKo2 Output Clock Period
CKo2 Output High Time
CKo2 Output Low Time
CKo2 Output Rise/Fall Time
t
FPW2
t
FODF2
56
25
61
66
36
ns
ns
C
L
= 30 pF
3
t
FODR2
25
36
ns
4
5
6
7
t
CKP2
t
CKH2
t
CKL2
t
rCK2
, t
fCK2
56
25
25
61
66
36
36
5
ns
ns
ns
ns
C
L
= 30 pF
AC Electrical Characteristics
- FPo2 and CKo2 or FPo3 and CKo3 (16.384 MHz) Timing (Multiplied Slave
Mode with more than 10 ns of Cycle to Cycle Variation on CKi)
Characteristic
Sym.
Min.
Typ.
Max.
Units
Notes
1
2
FPo2 Output Pulse Width
FPo2 Output Delay from the FPo2 falling edge
to the output frame boundary
FPo2 Output Delay from the output frame
boundary to the FPo2 rising edge
CKo2 Output Clock Period
CKo2 Output High Time
CKo2 Output Low Time
CKo2 Output Rise/Fall Time
t
FPW2
t
FODF2
56
25
61
66
36
ns
ns
C
L
= 30 pF
3
t
FODR2
25
36
ns
4
5
6
7
t
CKP2
t
CKH2
t
CKL2
t
rCK2
, t
fCK2
47
17
17
61
76
43
43
5
ns
ns
ns
ns
C
L
= 30 pF
t
FPW2
t
FODR2
t
FODF2
FPo2/FPo3
CKo2/CKo3
t
CKL2
t
CKH2
t
CKP2
t
rCK2
t
fCK2
Output Frame Boundary
V
CT
V
CT
相關(guān)PDF資料
PDF描述
ZL50015GAC Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCC Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCC1 Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50018 2 K Digital Switch with Enhanced Stratum 3 DPLL
ZL50018GAC 2 K Digital Switch with Enhanced Stratum 3 DPLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50015_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015GAC 制造商:Microsemi Corporation 功能描述:Switch Fabric 1K x 1K 1.8V/3.3V 256-Pin BGA Tray 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays
ZL50015GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays
ZL50015QCC 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256LQFP - Trays
ZL50015QCC1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
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