參數(shù)資料
型號： ZL50015
廠商： Zarlink Semiconductor Inc.
英文描述： Enhanced 1 K Digital Switch with Stratum 4E DPLL
中文描述： 增強1K的數(shù)字交換與地層4E條數(shù)字鎖相環(huán)
文件頁數(shù)： 75/122頁
文件大?。?/td> 926K
代理商： ZL50015
ZL50015
Data Sheet
75
Zarlink Semiconductor Inc.
4
R1FU
Reference 1 Single Period Upper Limit Fail Bit
If the device sets this bit to high, the input REF1 fails the single-period upper limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
3
R0FML
Reference 0 Multi-period Lower Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the multi-period lower limit check.
(See Table 12, “Multi-Period Hysteresis Limits” on page 45)
2
R0FMU
Reference 0 Multi-period Upper Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the multi-period upper limit
check. (See Table 12, “Multi-Period Hysteresis Limits” on page 45)
1
R0FL
Reference 0 Single Period Lower Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the single-period lower limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
0
R0FU
Reference 0 Single Period Upper Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the single-period upper limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
Bit
Name
Description
15
R3MML
Reference 3 Multi-period Lower Limit Mask Bit
When this bit is high, it masks the multi-period lower limit check (or forces pass) for
REF3.
14
R3MMU
Reference 3 Multi-period Upper Limit Mask Bit
When this bit is high, it masks the multi-period upper limit check (or forces pass) for
REF3.
13
R3ML
Reference 3 Single-period Lower Limit Mask Bit
When this bit is high, it masks the single-period lower limit check (or forces pass) for
REF3.
Table 40 - Reference Mask Register (RMR) Bits
Bit
Name
Description
Table 39 - Reference Failure Status Register (RSR) Bits - Read Only (continued)
External Read Only Address: 0069
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R3
FML
R3
FMU
R3
FL
R3
FU
R2
FML
R2
FMU
R2
FL
R2
FU
R1
FML
R1
FMU
R1
FL
R1
FU
R0
FML
R0
FMU
R0
FL
R0
FU
External Read/Write Address: 006A
H
Reset Value: 0000
H
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R3
MML
R3
MMU
R3
ML
R3
MU
R2
MML
R2
MMU
R2
ML
R2
MU
R1
MML
R1
MMU
R1
ML
R1
MU
R0
MML
R0
MMU
R0
ML
R0
MU
相關(guān)PDF資料
PDF描述
ZL50015GAC Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCC Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015QCC1 Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50018 2 K Digital Switch with Enhanced Stratum 3 DPLL
ZL50018GAC 2 K Digital Switch with Enhanced Stratum 3 DPLL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50015_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
ZL50015GAC 制造商:Microsemi Corporation 功能描述:Switch Fabric 1K x 1K 1.8V/3.3V 256-Pin BGA Tray 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays
ZL50015GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256BGA - Trays
ZL50015QCC 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 256LQFP - Trays
ZL50015QCC1 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 1 K Digital Switch with Stratum 4E DPLL
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