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參數(shù)資料
| 型號(hào)： | ZL50019QCC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Enhanced 2 K Digital Switch with Stratum 4E DPLL |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP256 |
| 封裝： | 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256 |
| 文件頁(yè)數(shù)： | 83/115頁(yè) |
| 文件大?。?/td> | 866K |
| 代理商： | ZL50019QCC |
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ZL50019
Data Sheet
83
Zarlink Semiconductor Inc.
25.3 Connection Memory High (CM_H) Bit Assignment
Connection memory high provides the detailed information required for
μ
-law and A-law conversion. ICL and OCL
bits describe the Input Coding Law and the Output Coding Law, respectively. They are used to select the expected
PCM coding laws for the connection, on the TDM inputs, and on the TDM outputs. The V/D bit is used to select the
class of coding law. If the V/D bit is cleared (to select a voice connection), the ICL and OCL bits select between
A-law and
μ
-law specifications related to G.711 voice coding. If the V/D bit is set (to select a data connection), the
ICL and OCL bits select between various bit inverting protocols. These coding laws are illustrated in the following
table. If the ICL is different than the OCL, all data bytes passing through the switch on that particular connection are
translated between the indicated laws. If the ICL and the OCL are the same, no coding law translation is performed.
The ICL, the OCL bits and V/D bit only have an effect on PCM code translations for constant delay connections,
variable delay connections and per-channel message mode.
Bit
Name
Description
15 - 5
Unused
Reserved
In normal functional mode, these bits
MUST
be set to zero.
4
V/D
Voice/Data Control
When this bit is low, the corresponding channel is for voice.
When this bit is high, the corresponding channel is for data.
3 - 2
ICL1 - 0
Input Coding Law.
1 - 0
OCL1 - 0
Output Coding Law
Note 1:
For proper
μ
-
law/A-law conversion, the CM_H bits should be set before Bit 15 of CM_L is set to high.
Refer to G.711 standard for detail information of different laws.
Note 2:
Table 54 - Connection Memory High (CM_H) Bit Assignment
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
V/D
ICL
1
ICL
0
OCL
1
OCL
0
ICL1-0
Input Coding Law
For Voice (V/D bit = 0)
For Data (V/D bit = 1)
00
CCITT.ITU A-law
CCITT.ITU
μ
-law
No code
01
ABI
10
A-law w/o ABI
μ
-law w/o Magnitude
Inversion
Inverted ABI
11
All Bits Inverted
OCL1-0
Output Coding Law
For Voice (V/D bit = 0)
For Data (V/D bit = 1)
00
CCITT.ITU A-law
CCITT.ITU
μ
-law
No code
01
ABI
10
A-law w/o ABI
μ
-law w/o Magnitude
Inversion
Inverted ABI
11
All Bits Inverted
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相關(guān)代理商/技術(shù)參數(shù) |
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| ZL50019QCG1 | 制造商:Microsemi Corporation 功能描述:PB FREE 2K WITH+CONVERSION AND S4E DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 2K-CH ENH 256LQFP |
| ZL50020 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 2 K Digital Switch |
| ZL50020GAC | 制造商:Microsemi Corporation 功能描述:2K WITH RATE CONVERSION - Trays |
| ZL50020GAG2 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K 1.8V/3.3V 256BGA - Trays 制造商:Microsemi Corporation 功能描述:TIME SLOT INTERFACE ZL50020GAG2 |
| ZL50020QCC | 制造商:Microsemi Corporation 功能描述: |
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