24
9-14
9-15
9-16
9-17
9-18
9-19
9-20
9-21
9-22
Timing of Interval Timer Operation (1) ...............................................................................................
Control Register Settings for Interval Timer Operation (1) ...............................................................
Setting Procedure of Interval Timer Operation (1) ............................................................................
Interrupt Request Processing of Interval Timer Operation (1)..........................................................
Timing of Interval Timer Operation (2) ...............................................................................................
Control Register Settings for Interval Timer Operation (2) ...............................................................
Setting Procedure of Interval Timer Operation (2) ............................................................................
Operation When Counting Is Started.................................................................................................
Operation When Compare Register (CM10, CM11) Is Set to 0000H ..............................................
219
220
221
221
222
223
223
224
226
10-1
10-2
10-3
10-4
10-5
10-6
10-7
10-8
10-9
10-10
10-11
10-12
10-13
10-14
10-15
10-16
10-17
10-18
10-19
10-20
10-21
10-22
10-23
10-24
10-25
10-26
10-27
10-28
10-29
10-30
10-31
10-32
10-33
Block Diagram of Timer/Counter 2.....................................................................................................
Format of Timer Unit Mode Register 2 (TUM2).................................................................................
Format of Timer Mode Control Register 2 (TMC2) ...........................................................................
Format of Timer Output Control Register 2 (TOC2)..........................................................................
Format of Prescaler Mode Register 2 (PRM2)..................................................................................
Basic Operation of Timer Register 2 (TM2).......................................................................................
TM2 Clear Operation by Match With Compare Register (CM20/CM21)..........................................
TM2 Clear Operation When CE2 Bit is Cleared (0) ..........................................................................
Timing of Timer/Counter 2 External Event Count..............................................................................
Compare Operation (timer/counter 2)................................................................................................
TM2 Clearance after Match Detection ...............................................................................................
Operation of Toggle Output ................................................................................................................
PWM Pulse Output .............................................................................................................................
Example of PWM Output Using TM2 .................................................................................................
Example of PWM Output When CM20 = FFFFH ..............................................................................
Example of Compare Register (CM20) Rewrite ................................................................................
Example of 100 % Duty With PWM Output .......................................................................................
When Timer/Counter 2 is Stopped During PWM Signal Output .......................................................
Example of PPG Output Using TM2 ..................................................................................................
Example of Compare Register (CM20) Rewrite ................................................................................
Example of 100 % Duty With PPG Output ........................................................................................
Example of Extended PPG Output Cycle ..........................................................................................
When Timer/Counter 2 is Stopped During PPG Signal Output ........................................................
Timing of Interval Timer Operation (1) ...............................................................................................
Control Register Settings for Interval Timer Operation (1) ...............................................................
Setting Procedure of Interval Timer Operation (1) ............................................................................
Interrupt Request Processing of Interval Timer Operation (1)..........................................................
Timing of Interval Timer Operation (2) ...............................................................................................
Control Register Settings for Interval Timer Operation (2) ...............................................................
Setting Procedure of Interval Timer Operation (2) ............................................................................
Example of Timer/Counter 2 PWM Signal Output.............................................................................
Control Register Settings for PWM Output Operation ......................................................................
Setting Procedure of PWM Output.....................................................................................................
230
232
233
234
235
237
238
239
240
243
244
245
247
248
248
249
250
251
253
254
255
256
257
258
259
260
260
261
262
263
264
265
266
LIST OF FIGURES (4/8)
Figure No.
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