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CHAPTER 16 INTERRUPT FUNCTIONS
16.11.1 Interrupt acceptance processing time
To accept an interrupt, the time shown in Table 16-11 is required. After this time has elapsed, the interrupt processing
routine is executed.
Table 16-11. Interrupt Acceptance Processing Time
(unit: clock)
Interrupt Processing Mode
Vectored Interrupt
Context
Vector table
IROM, EMEM16
EMEM8
Switching
Branch Detection
Stack
IRAM
PRAM
EMEM16
EMEM8
IRAM
PRAM
EMEM16
EMEM8
IROM, PRAM
26
30
30+2n
38+4n
30
34
34+2n
42+4n
22
EMEM16, EMEM8
27
31
31+2n
39+4n
31
35
35+2n
43+4n
23
Remarks 1.
IROM
IRAM
PRAM
: internal ROM (with high-speed fetch specified)
: internal high-speed RAM
: peripheral RAM (only when the LOCATION 0 instruction is executed in the case of branch
destination)
EMEM16: external memory and internal ROM not specified for high-speed fetch and set to 16-bit bus
width
EMEM8 : external memory and internal ROM not specified for high-speed fetch and set to 8-bit bus
width
n indicates the number of wait states per byte necessary for writing to the stack.
If the vector table is EMEM16 or EMEM8 and if wait states are inserted when reading the vector table,
the processing time is extended. Add 2m in the case of vector interrupt with EMEM8 or m in the case
of context switching with EMEM16 to the values in the above table. m is the number of wait states per
byte necessary for reading the vector table.
If the branch destination is EMEM16 or EMEM8, and if wait states are inserted when reading the
instruction at the branch destination, add the number of wait states to the value in the above table.
If the stack is in PRAM and the value of the stack pointer (SP) is odd, add 8 to the value in the above
table. If the value of SP is odd with EMEM16, add 8+2n to the value in the above table.
The number of wait states is the total number of address wait and access wait states.
2.
3.
4.
5.
6.