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Preliminary User’s Manual S14767EJ1V0UM00
373
CHAPTER 6 USB CONTROLLER
6.1 Overview
This block is built into the
μ
PD98501 Access Network Controller and, in cooperation with the USB, performs the
processing required for transferring data. The following lists the features of USB Controller.
6.1.1 Features
Conforms to Universal Serial Bus Specification Rev 1.1
Supports operation conforming to the USB Communication Device Class Specification
Supports data transfer at full speed (12 Mbps)
In addition to the control Endpoint, a further six Endpoints are built in
(Interrupt in/out, Isochronous in/out and Bulk in/out)
For Control transfer, a built-in 64-byte FIFO is provided for send
For Isochronous transfer, a built-in 128-byte FIFO is provided for send
For Bulk transfer, a built-in 128-byte FIFO is provided for send
For Interrupt transfer, a built-in 64-byte FIFO is provided for send
For Control/Isochronous/Bulk/Interrupt transfer, a built-in 128-byte shared FIFO is provided for receive
A DMA function for transferring send/receive data is built in
A Control/Status registers are built in
Compatible with the Suspend and Resume signaling issued from the Host PC
(Processing by the V
R
4120A RISC Processor is required)
Remote Wake-up is supported (Processing by the V
R
4120A RISC Processor is required)
Directly connect to Internal BUS (IBUS) Master and Slave Interface block
All the counters required to indicate the USB status are built in