參數(shù)資料
型號: 2495
廠商: Linear Technology Corporation
英文描述: 16-Bit 8-/16-Channel ツヒ ADC with PGA, Easy Drive and I2C Interface
中文描述: 16位8-/16-ChannelツヒADC,帶PGA巡回賽,輕松驅(qū)動和I2C接口
文件頁數(shù): 11/32頁
文件大?。?/td> 558K
代理商: 2495
LTC2495
11
2495f
PIN FUNCTIONS
ADCINN (Pin 26):
Negative ADC Input. Connect to the
output of a buffer/amplifier driven by MUXOUTN or short
directly to MUXOUTN.
MUXOUTN (Pin 27):
Negative Multiplexer Output. Con-
nect to the input of an external buffer/amplifier or short
directly to ADCINN.
V
CC
(Pin 28):
Positive Supply Voltage. Bypass to GND with
a 10μF tantalum capacitor in parallel with a 0.1μF ceramic
capacitor as close to the part as possible.
REF
+
, REF
(Pin 29, Pin 30):
Differential Reference Input.
The voltage on these pins can have any value between
GND and V
CC
as long as the reference positive input,
REF
+
, remains more positive than the negative reference
input, REF
, by at least 0.1V. The differential voltage (V
REF
= REF
+
– REF
) sets the full-scale range (–0.5 V
REF
/Gain
to 0.5 V
REF
/Gain) for all input channels.
F
O
(Pin 35):
Frequency Control Pin. Digital input that
controls the internal conversion clock rate. When F
O
is
connected to GND, the converter uses its internal oscil-
lator running at 307.2kHz. The conversion clock may
also be overridden by driving the F
O
pin with an external
clock in order to change the output rate and the digital
filter rejection null.
CA0, CA1, CA2 (Pins 36, 37, 38):
Chip Address Control
Pins. These pins are configured as a three-state (LOW,
HIGH, Floating) address control bits for the device I
2
C
address.
Exposed Pad (Pin 39):
Ground. This pin is ground and
must be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain floating.
FUNCTIONAL BLOCK DIAGRAM
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
Σ
MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
I
2
C
2-WIRE
INTERFACE
GND
V
CC
CH0
CH1
CH15
COM
MUX
SDA
REF
+
REF
ADCINN
MUXOUTN
ADCINP
MUXOUTP
SCL
F
(INT/EXT)
2495 BD
+
TEMP
SENSOR
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