參數(shù)資料
型號(hào)： 2495
廠商： Linear Technology Corporation
英文描述： 16-Bit 8-/16-Channel ツヒ ADC with PGA, Easy Drive and I2C Interface
中文描述： 16位8-/16-ChannelツヒADC，帶PGA巡回賽，輕松驅(qū)動(dòng)和I2C接口
文件頁(yè)數(shù)： 16/32頁(yè)
文件大小： 558K
代理商： 2495
LTC2495
16
2495f
INPUT DATA FORMAT
The serial input word to the LTC2495 is 16 bits long and
is written into the device input register in two 8-bit words.
The first word (SGL, ODD, A2, A1, A0) is used to select
the input channel. The second word of data (IM, FA, FB,
SPD, GS2, GS1, GS0) is used to select the frequency
rejection, speed mode (1x, 2x), temperature measure-
ment, and gain.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN
+
= CH0, IN
–
=
CH1), the frequency rejection to simultaneous 50Hz/60Hz,
and 1x output rate (auto-calibration enabled), and gain = 1.
The first conversion automatically begins at power-up using
this default configuration. Once the conversion is complete,
up to two words may be written into the device.
The first three bits of the first input word consist of two
preamble bits and one enable bit. Valid settings for these
three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data is ig-
nored (don’t care) and the previously selected input channel
and configuration remain valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
nels can be selected to form a differential input. For SGL
= 1, one of 16 channels is selected as the positive input.
The negative input is COM for all single-ended operations.
The remaining four bits (ODD, A2, A1, A0) determine
which channel(s) is/are selected and the polarity (for a
differential input).
Once the first word is written into the device, a second
word may be input in order to select a configuration mode.
Figure 3a. Timing Diagram for Reading from the LTC2495
APPLICATIONS INFORMATION
Figure 3b. Timing Diagram for Writing to the LTC2495
SLEEP
DATA INPUT
ACK BY
LTC2495
ACK
LTC2495
ACK
LTC2495
(OPTIONAL 2ND BYTE)
START BY
MASTER
SGL
ODD
W
0
1
SCL
SDA
EN
A2
A1
A0
7
…
8
9
1
2
9
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
1
7-BIT ADDRESS
2495 F03b
IM
FA
EN2
FB
SPD GS2 GS1 GS0
SLEEP
DATA OUTPUT
ACK BY
LTC2497
ACK BY
MASTER
ALWAYS LOW
START BY
MASTER
NAK BY
MASTER
LSB
R
MSB
SGN
BIT 21
7
…
…
8
9
1
2
9
1
2
3
4
5
6
7
8
9
1
7-BIT
ADDRESS
2495 F03a
SCL
SDA
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