參數(shù)資料
型號(hào)： 28F004SC
廠商： Intel Corp.
英文描述： BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述： 字節(jié)寬SmartVoltage FlashFile Memory系列4，8和16兆比特
文件頁數(shù)： 31/41頁
文件大?。?/td> 703K
代理商： 28F004SC
E
6.4
BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY
31
PRELIMINARY
DC Characteristics
— Commercial Temperature
(Continued)
2.7 V V
CC
3.3 V V
CC
Test
Sym
Parameter
Notes Min
Max
Min
Max Unit
Conditions
V
IL
V
IH
Input Low Voltage
7
–0.5
0.8
–0.5
0.8
V
Input High Voltage
7
2.0
V
CC
+ 0.5
0.4
2.0
V
CC
+ 0.5
0.4
V
V
OL
Output Low Voltage
3,7
V
V
CC
= V
CC
Min
I
OL
= 2 mA
V
CC
= V
CC
Min
I
OH
= –2.5 mA
V
CC
= V
CC
Min
I
OH
= –2.5 mA
V
CC
= V
CC
Min
I
OH
= –100 μA
V
OH1
Output High Voltage
(TTL)
3,7
2.4
2.4
V
V
OH2
Output High Voltage
(CMOS)
3,7
0.85
V
CC
0.85
V
CC
V
V
CC
–0.4
V
CC
–0.4
V
V
PPLK
V
PPH1
V
PPH2
V
PP
Lockout Voltage
V
PP
Voltage
V
PP
Voltage
4,7
1.5
1.5
V
2.7
3.6
2.7
3.6
V
11.4
12.6
V
V
LKO
V
HH
V
CC
Lockout Voltage
RP# Unlock Voltage
2.0
2.0
11.4
V
V
8,9
12.6
Set Master Lock-Bit
Override Lock-Bit
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at nominal V
CC
voltage and T
A
= +25
°
C. These currents are
valid for all product versions (packages and speeds).
2. I
CCWS
and I
CCES
are specified with the device de-selected. If read or written while in erase suspend mode, the device’s
current is the sum of I
CCWS
or I
CCES
and I
CCR
or I
CCW
.
3. Includes RY/BY#.
4. Block erases, program, and lock-bit configurations are inhibited when V
PP
≤
V
PPLK
, and not guaranteed in the range
between V
PPLK
(max) and V
PPH1
(min), between V
PPH1
(max) and V
PPH2
(min), and above V
PPH2
(max).
5. Automatic Power Savings (APS) reduces typical I
CCR
to 3 mA at 3.3 V V
CC
in static operation.
6. CMOS inputs are either V
CC
± 0.2 V or GND ± 0.2 V. TTL inputs are either V
IL
or V
IH
.
7. Sampled, not 100% tested.
8. Master lock-bit set operations are inhibited when RP# = V
IH
. Block lock-bit configuration operations are inhibited when the
master lock-bit is set and RP# = V
IH
. Block erases and program are inhibited when the corresponding block-lock bit is set
and RP# = V
IH
. Block erase, program, and lock-bit configuration operations are not guaranteed and should not be
attempted with V
IH
< RP# < V
HH
.
9. RP# connection to a V
HH
supply is allowed for a maximum cumulative period of 80 hours.
相關(guān)PDF資料
PDF描述
28F008B3 SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
28F008C3 3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
28F008SA 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY
28F008S3 3 V FlashFile Memory(3V閃速存儲(chǔ)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F008B3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
28F008BE-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-MBIT (512K X 16. 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
28F008BV-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Boot Flash
28F008C3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
28F008S3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Byte-Wide Smart 3 Flashfile Memory Family 4 8 and
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*