參數(shù)資料
型號(hào)： 28F004SC
廠商： Intel Corp.
英文描述： BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT
中文描述： 字節(jié)寬SmartVoltage FlashFile Memory系列4，8和16兆比特
文件頁(yè)數(shù)： 7/41頁(yè)
文件大?。?/td> 703K
代理商： 28F004SC
E
BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY
7
PRELIMINARY
Table 1. Pin Descriptions
Sym
Type
Name and Function
A
0
–A
20
INPUT
ADDRESS INPUTS:
Inputs for addresses during read and write operations.
Addresses are internally latched during a write cycle.
4 Mbit
→
A
0
–A
18
8 Mbit
→
A
0
–A
19
16 Mbit
→
A
0
–A
20
DATA INPUT/OUTPUTS:
Inputs data and commands during CUI write cycles;
outputs data during memory array, status register, and identifier code read cycles.
Data pins float to high-impedance when the chip is deselected or outputs are
disabled. Data is internally latched during a write cycle.
DQ
0
–DQ
7
INPUT/
OUTPUT
CE#
INPUT
CHIP ENABLE:
Activates the device’s control logic, input buffers, decoders, and
sense amplifiers. CE#-high deselects the device and reduces power consumption to
standby levels.
RP#
INPUT
RESET/DEEP POWER-DOWN:
When driven low, RP# inhibits write operations
which provides data protection during power transitions, puts the device in deep
power-down mode, and resets internal automation. RP#-high enables normal
operation. Exit from deep power-down sets the device to read array mode.
RP# at V
HH
enables setting of the master lock-bit and enables configuration of block
lock-bits when the master lock-bit is set. RP# = V
HH
overrides block lock-bits,
thereby enabling block erase and program operations to locked memory blocks.
Block erase, program, or lock-bit configuration with V
IH
< RP# < V
HH
produce
spurious results and should not be attempted.
OE#
INPUT
OUTPUT ENABLE:
Gates the device’s outputs during a read cycle.
WE#
INPUT
WRITE ENABLE:
Controls writes to the CUI and array blocks. Addresses and data
are latched on the rising edge of the WE# pulse.
RY/BY#
OUTPUT
READY/BUSY#:
Indicates the status of the internal WSM. When low, the WSM is
performing an internal operation (block erase, program, or lock-bit). RY/BY#-high
indicates that the WSM is ready for new commands, block erase or program is
suspended, or the device is in deep power-down mode. RY/BY# is always active.
V
PP
SUPPLY
BLOCK ERASE, PROGRAM, LOCK-BIT CONFIGURATION POWER SUPPLY:
For erasing array blocks, programming data, or configuring lock-bits.
Smart 3 Flash
→
2.7 V, 3.3 V and 12 V V
PP
With V
PP
≤
V
PPLK
, memory contents cannot be altered. Block erase, program, and
lock-bit configuration with an invalid V
PP
(see
DC Characteristics
) produce spurious
results and should not be attempted.
V
CC
SUPPLY
DEVICE POWER SUPPLY:
Internal detection automatically configures the device
for optimized read performance. Do not float any power pins.
Smart 3 Flash
→
2.7 V and 3.3 V V
CC
With V
CC
≤
V
LKO
, all write attempts to the flash memory are inhibited. Device
operations at invalid V
CC
voltages (see
DC Characteristics
) produce spurious
results and should not be attempted. Block erase, program, and lock-bit
configuration operations with V
CC
< 2.7 V are not supported.
SUPPLY
GROUND:
Do not float any ground pins.
GND
NC
NO CONNECT:
Lead is not internally connected; it may be driven or floated.
相關(guān)PDF資料
PDF描述
28F008B3 SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
28F008C3 3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
28F008SA 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY
28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY
28F008S3 3 V FlashFile Memory(3V閃速存儲(chǔ)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F008B3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
28F008BE-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-MBIT (512K X 16. 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
28F008BV-T/B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Boot Flash
28F008C3 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
28F008S3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Byte-Wide Smart 3 Flashfile Memory Family 4 8 and
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