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| 型號(hào)： | 28F004SC |
| 廠商： | Intel Corp. |
| 英文描述： | BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT |
| 中文描述： | 字節(jié)寬SmartVoltage FlashFile Memory系列4，8和16兆比特 |
| 文件頁(yè)數(shù)： | 36/41頁(yè) |
| 文件大小： | 703K |
| 代理商： | 28F004SC |
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BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY
E
36
PRELIMINARY
6.6
T
A
= 0 °C to +70 °C
AC Characteristics
—Write Operations
(1, 2)
—Commercial Temperature
Versions
(4)
3.3V ± 0.3V,
2.7V
3.6V V
CC
Valid for All
Speeds
Unit
#
Sym
Parameter
Notes
Min
Max
W1
t
PHWL
(t
PHEL
)
RP# High Recovery to WE# (CE#) Going Low
3
1
μs
W2
t
ELWL
(t
WLEL
)
CE# (WE#) Setup to WE# (CE#) Going Low
7
0
ns
W3
t
WP
Write Pulse Width
7
70
ns
W4
t
DVWH
(t
DVEH
)
Data Setup to WE# (CE#) Going High
4
50
ns
W5
t
AVWH
(t
AVEH
)
Address Setup to WE# (CE#) Going High
4
50
ns
W6
t
WHEH
(t
EHWH
)
CE# (WE#) Hold from WE# (CE#) High
0
ns
W7
t
WHDX
(t
EHDX
)
Data Hold from WE# (CE#) High
5
ns
W8
t
WHAX
(t
EHAX
)
Address Hold from WE# (CE#) High
5
ns
W9
t
WPH
Write Pulse Width High
9
25
ns
W10
t
PHHWH
(t
PHHEH
)
RP# V
HH
Setup to WE# (CE#) Going High
3,8
100
ns
W11
t
VPWH
(t
VPEH
)
V
PP
Setup to WE# (CE#) Going High
3,8
100
ns
W12
t
WHRL
(t
EHRL
)
WE# (CE#) High to RY/BY# Going Low
8
90
ns
W13
t
WHGL
(t
EHGL
)
Write Recovery before Read
0
ns
W14
t
QVPH
RP# V
HH
Hold from Valid SRD, RY/BY# High
3,5,8
0
ns
W15
t
QVVL
V
PP
Hold from Valid SRD, RY/BY# High
3,5,8
0
ns
NOTES:
1.
Read timing characteristics during block erase, program, and lock-bit configuraion operations are the same as during
read-only operations. Refer to AC Characteristics
—Read-Only Operations
.
A write operation can be initiated and terminated with either CE# or WE#.
Sampled, not 100% tested.
Refer to Table 3 for valid A
IN
and D
IN
for block erase, program, or lock-bit configuration.
V
should be held at V
(and if necessary RP# should be held at V
HH
) until determination of block erase, program, or
lock-bit configuration success (SR.1/3/4/5 = 0).
See Ordering Information for device speeds (valid operational combinations).
Write pulse width (t
) is defined from CE# or WE# going low (whichever goes low last) to CE# or WE# going high
(whichever goes high first). Hence, t
= t
= t
= t
WLEH
= t
ELWH
. If CE# is driven low 10 ns before WE# going low,
WE# pulse width requirement decreases to t
WP
- 20 ns.
Block erase, program, and lock-bit configuration with V
CC
<
2.7 V should not be attempted.
Write pulse width high (t
) is defined from CE# or WE# going high (whichever goes high first) to CE# or WE# going low
(whichever goes low last). Hence, t
WPH
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
2.
3.
4.
5.
6.
7.
8.
9.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 28F008B3 | SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE |
| 28F008C3 | 3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F008SA | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| 28F008SA-L | 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY |
| 28F008S3 | 3 V FlashFile Memory(3V閃速存儲(chǔ)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F008B3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE |
| 28F008BE-T/B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-MBIT (512K X 16. 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY |
| 28F008BV-T/B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Boot Flash |
| 28F008C3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3 VOLT ADVANCED+ BOOT BLOCK 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F008S3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Byte-Wide Smart 3 Flashfile Memory Family 4 8 and |
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