參數(shù)資料
型號(hào): 29LV650
廠商: Fujitsu Limited
英文描述: 64M (4M x 16) BIT
中文描述: 64M號(hào)(4米× 16)位
文件頁(yè)數(shù): 22/57頁(yè)
文件大?。?/td> 625K
代理商: 29LV650
MBM29LV650UE/651UE-
90/12
22
Multiple sectors may be erased concurrently by writing the six bus cycle operations on Table 3. This sequence
is followed with writes of the Sector Erase command to addresses in other sectors desired to be concurrently
erased. The time between writes must be less than “t
TOW
” otherwise that command will not be accepted and
erasure will start. It is recommended that processor interrupts be disabled during this time to guarantee this
condition. The interrupts can be re-enabled after the last Sector Erase command is written. A time-out of “t
TOW
from the rising edge of last CE or WE whichever happens first will initiate the execution of the Sector Erase
command(s). If another falling edge of CE or WE, whichever happens first occurs within the “t
TOW
” time-out
window the timer is reset. (Monitor DQ
3
to determine if the sector erase timer window is still open, see section
DQ
3
, Sector Erase Timer.) Any command other than Sector Erase or Erase Suspend during this time-out period
will reset the devices to the read mode, ignoring the previous command string. Resetting the devices once
execution has begun will corrupt the data in the sector. In that case, restart the erase on those sectors and allow
them to complete. (Refer to the Write Operation Status section for Sector Erase Timer operation.) Loading the
sector erase buffer may be done in any sequence and with any number of sectors (0 to 127).
Sector erase does not require the user to program the devices prior to erase. The devices automatically program
all memory locations in the sector(s) to be erased prior to electrical erase (Preprogram function). When erasing
a sector or sectors the remaining unselected sectors are not affected. The system is not required to provide any
controls or timings during these operations.
The system can determine the status of the erase operation by using DQ
7
(Data Polling), and DQ
6
(Toggle Bit).
The sector erase begins after the “t
TOW
” time out from the rising edge of CE or WE whichever happens first for
the last sector erase command pulse and terminates when the data on DQ
7
is “1” (See Write Operation Status
section.) at which time the devices return to the read mode. Data polling and Toggle Bit must be performed at
an address within any of the sectors being erased.
Multiple Sector Erase Time; [Sector Erase Time + Sector Program Time (Preprogramming)]
×
Number of Sector
Erase
Figure 17 illustrates the Embedded Erase
TM
Algorithm using typical command strings and bus operations.
Erase Suspend/Resume
The Erase Suspend command allows the user to interrupt a Sector Erase operation and then perform data reads
from or programs to a sector not being erased. This command is applicable ONLY during the Sector Erase
operation which includes the time-out period for sector erase. The Erase Suspend command will be ignored if
written during the Chip Erase operation or Embedded Program Algorithm. Writting the Erase Suspend command
(B0h) during the Sector Erase time-out results in immediate termination of the time-out period and suspension
of the erase operation.
Writing the Erase Resume command (30h) resumes the erase operation. The addresses are “Don’t Care” when
writting the Erase Suspend or Erase Resume command.
When the Erase Suspend command is written during the Sector Erase operation, the device will take a maximum
of “t
SPD
” to suspend the erase operation. When the devices have entered the erase-suspended mode, the DQ
7
bit will be at logic “1” and DQ
6
will stop toggling. The user must use the address of the erasing sector for reading
DQ
6
and DQ
7
to determine if the erase operation has been suspended. Further writes of the Erase Suspend
command are ignored.
When the erase operation has been suspended, the devices default to the erase-suspend-read mode. Reading
data in this mode is the same as reading from the standard read mode except that the data must be read from
sectors that have not been erase-suspended. Successively reading from the erase-suspended sector while the
device is in the erase-suspend-read mode will cause DQ
2
to toggle. (See the section on DQ
2
.)
相關(guān)PDF資料
PDF描述
29LV800BB-70 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BB-90 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-70 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-90 8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BE 8M (1M x 8/512 K x 16) BIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
29LV800BB-70 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BB-90 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BE 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:8M (1M x 8/512 K x 16) BIT
29LV800BT-70 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
29LV800BT-90 制造商:MCNIX 制造商全稱:Macronix International 功能描述:8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY