參數(shù)資料
型號(hào)： 29LV650
廠商： Fujitsu Limited
英文描述： 64M (4M x 16) BIT
中文描述： 64M號(hào)（4米× 16）位
文件頁(yè)數(shù)： 24/57頁(yè)
文件大?。?/td> 625K
代理商： 29LV650
MBM29LV650UE/651UE-
90/12
24
Hidden ROM (Hi-ROM) Region
The Hi-ROM feature provides a Flash memory region that the system may access through a new command
sequence. This is primarily intended for customers who wish to use an Electronic Serial Number (ESN) in the
device with the ESN protected against modification. Once the Hi-ROM region is programmed, any further
modification of that region is impossible. This ensures the security of the ESN once the product is shipped to
the field.
The Hi-ROM region is 128 words in length. After the system has written the Enter Hi-ROM command sequence,
it may read the Hidden ROM region by using device addresses A
0
to A
6
(A
7
to A
14
are “00”, A
15
to A
21
are don’t
care). That is, the device sends only program command that would normally be sent to the address to the Hi-
ROM region. This mode of operation continues until the system issues the Exit Hi-ROM command sequence,
or until power is removed from the device. On power-up, or following a hardware reset, the device reverts to
sending commands to the address.
If you request Fujitsu to program the ESN in the device, please contact a Fujitsu representative for more
information.
Write Operation Status
Detailed in Table 8 are all the status flags that can be used to check the status of the device for current mode
operation. During sector erase, the part provides the status flags automatically to the I/O ports. The information
on DQ
2
is address sensitive. This means that if an address from an erasing sector is consecutively read, then
the DQ
2
bit will toggle. However, DQ
2
will not toggle if an address from a non-erasing sector is consecutively
read. This allows the user to determine which sectors are erasing and which are not.
Once erase suspend is entered, address sensitivity still applies. If the address of a non-erasing sector (that is,
one available for read) is provided, then stored data can be read from the device. If the address of an erasing
sector (that is, one unavailable for read) is applied, the device will output its status bits.
*: Successive reads from the erasing or erase-suspend sector will cause DQ
2
to toggle. Reading from non-erase
suspend sector address will indicate logic “1” at the DQ
2
bit.
Notes: 1. DQ
0
and DQ
1
are reserve pins for future use.
2. DQ
4
is Fujitsu internal use only.
Table 8 Hardware Sequence Flags
Status
DQ
7
DQ
6
DQ
5
DQ
3
DQ
2
In Progress
Embedded Program Algorithm
DQ
7
Toggle
0
0
1
Embedded Erase Algorithm
0
Toggle
0
1
Toggle*
Erase
Suspended
Mode
Erase Suspend Read
(Erase Suspended Sector)
1
1
0
0
Toggle
Erase Suspend Read
(Non-Erase Suspended Sector)
Data
Data
Data
Data
Data
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
0
0
1*
Exceeded
Time Limits
Embedded Program Algorithm
DQ
7
Toggle
1
0
1
Embedded Erase Algorithm
0
Toggle
1
1
N/A
Erase
Suspended
Mode
Erase Suspend Program
(Non-Erase Suspended Sector)
DQ
7
Toggle
1
0
N/A
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