Timer Interface Module A (TIMA)
Technical Data
MC68HC08AZ32A — Rev 1.0
398
Timer Interface Module A (TIMA)
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MOTOROLA
22.9.1 TIMA Status and Control Register
The TIMA status and control register:
Enables TIMA overflow interrupts
Flags TIMA overflows
Stops the TIMA counter
Resets the TIMA counter
Prescales the TIMA counter clock
TOF — TIMA Overflow Flag Bit
This read/write flag is set when the TIMA counter reaches the modulo
value programmed in the TIMA counter modulo registers. Clear TOF
by reading the TIMA status and control register when TOF is set and
then writing a logic 0 to TOF. If another TIMA overflow occurs before
the clearing sequence is complete, then writing logic 0 to TOF has no
effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a logic
1 to TOF has no effect.
1 = TIMA counter has reached modulo value.
0 = TIMA counter has not reached modulo value.
TOIE — TIMA Overflow Interrupt Enable Bit
This read/write bit enables TIMA overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
1 = TIMA overflow interrupts enabled
0 = TIMA overflow interrupts disabled
Address:
$0020
Bit 7
6
5
4
3
2
1
Bit 0
Read:
TOF
TOIE
TSTOP
0
0
PS2
PS1
PS0
Write:
0
TRST
R
Reset:
0
0
1
0
0
0
0
0
R
= Reserved
Figure 22-4. TIMA Status and Control Register (TASC)
F
Freescale Semiconductor, Inc.
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