參數(shù)資料
型號: 6PAIC3106IRGZRQ1
廠商: Texas Instruments
文件頁數(shù): 37/103頁
文件大?。?/td> 0K
描述: IC AUDIO CODEC STEREO 48-QFN
標準包裝: 1
類型: 立體聲音頻
數(shù)據(jù)接口: 串行
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標準 ADC / DAC (db): 92 / 102(差分),92 / 95(單端)
動態(tài)范圍,標準 ADC / DAC (db): 91 / 99(差分),91 / 92(單端)
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-VQFN 裸露焊盤(7x7)
包裝: 標準包裝
產(chǎn)品目錄頁面: 1077 (CN2011-ZH PDF)
其它名稱: 296-25253-6
SLAS663B – AUGUST 2009 – REVISED OCTOBER 2012
However, due to the possible wide variation in analog supply range (2.7 V to 3.6 V), an output common-mode
voltage setting of 1.35 V, which would be used for a 2.7 V supply case, will be overly conservative if the supply is
actually much larger, such as 3.3 V or 3.6 V. In order to optimize device operation, the TLV320AIC3106 includes
a programmable output common-mode level, which can be set by register programming to a level most
appropriate to the actual supply range used by a particular customer. The output common-mode level can be
varied among four different values, ranging from 1.35 V (most appropriate for low supply ranges, near 2.7 V) to
1.8 V (most appropriate for high supply ranges, near 3.6 V). Note that there is also some limitation on the range
of DVDD voltage as well in determining which setting is most appropriate.
Table 7. Appropriate Settings
CM SETTING
RECOMMENDED AVDD_DAC,
RECOMMENDED DVDD
DRVDD
1.35
2.7 V – 3.6 V
1.65 V – 1.95 V
1.50
3.0 V – 3.6 V
1.65 V – 1.95 V
1.65 V
3.3 V – 3.6 V
1.8 V – 1.95 V
1.8 V
3.6 V
1.95 V
AUDIO DAC POWER CONTROL
The stereo DAC can be fully powered up or down, and in addition, the analog circuitry in each DAC channel can
be powered up or down independently. This provides power savings when only a mono playback stream is
needed.
AUDIO ANALOG INPUTS
The TLV320AIC3106 includes ten analog audio input pins, which can be configured as up to four fully-differential
pair plus one single-ended pair of audio inputs, or up to six single-ended audio inputs. . These pins connect
through series resistors and switches to the virtual ground terminals of two fully differential opamps (one per
ADC/PGA channel). By selecting to turn on only one set of switches per opamp at a time, the inputs can be
effectively muxed to each ADC PGA channel.
By selecting to turn on multiple sets of switches per opamp at a time, mixing can also be achieved. Mixing of
multiple inputs can easily lead to PGA outputs that exceed the range of the internal opamps, resulting in
saturation and clipping of the mixed output signal. Whenever mixing is being implemented, the user should take
adequate precautions to avoid such a saturation case from occurring. In general, the mixed signal should not
exceed 2 Vpp (single-ended) or 4 Vpp (differential).
In most mixing applications, there is also a general need to adjust the levels of the individual signals being
mixed. For example, if a soft signal and a large signal are to be mixed and played together, the soft signal
generally should be amplified to a level comparable to the large signal before mixing. In order to accommodate
this need, the TLV320AIC3106 includes input level control on each of the individual inputs before they are mixed
or muxed into the ADC PGAs, with gain programmable from 0 dB to –12 dB in 1.5 dB steps. Note that this input
level control is not intended to be a volume control, but instead used occasionally for level setting. Soft-stepping
of the input level control settings is implemented in this device, with the speed and functionality following the
settings used by the ADC PGA for soft-stepping.
The TLV320AIC3106 supports the ability to mix up to three fully-differential analog inputs into each ADC PGA
channel. Figure 31 shows the mixing configuration for the left channel, which can mix the signals LINE1LP-
LINE1LM, LINE2LP-LINE2LM, and LINE1RP-LINE1RM
Copyright 2009–2012, Texas Instruments Incorporated
39
Product Folder Links: TLV320AIC3106-Q1
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