參數(shù)資料
型號(hào)： 73S1217F-EB-LITE
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 66/93頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL 73S1217F CBL/DOC/CD
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
系列： *
UG_12xxF_016
73S12xxF Software User Guide
Rev. 1.50
69
SetPassCode ( )
Purpose
Change the PassCode to a new value. The first (and default) passcode is 0x5AA5
and is stored at location 0x01E0 and 0x01E1. When SetPassCode() is executed the
first time, it writes 0x0000 to these two addresses. The new PassCode will be written
at 0x01E2 and 0x01E3. Each time this function is called, the new PassCode will be
written at the next two consecutive address locations and the location of the
OldPassCode will be over-written with a value of 0x0000. Once the new PassCode
reaches the last location (address location 0x01F1), this function will no longer be
allowed to change the PassCode.
Synopsis
SetPassCode ( U16 OldPassCode, U16 NewPassCode );
Parameters
OldPassCode: Input parameter
Old PassCode as stored in the Boot Loader code space.
NewPassCode: Input parameter
NewPassCode to be stored in the new passcode location.
Return Codes
TRUE if both the OldPassCode is validated and the number of passcode changes
has not exceeded 8. (The total number of passcode changes allowed is 8)
4.2.18 Security Mode Management - Available with the LAPI-*BL.lib Only
There are three possible security modes, defined as MODE0, MODE1 and MODE2. MODE0 and
MODE1 are directly controlled by the hardware by a call to the LAPI. MODE2 is controlled by the
application layer using the PassCode mechanism as designed by LAPI. A correct PassCode is required
before the security mode can be set. The Security Mode Management API includes:
The processes which occur when initiating each of the three modes are described below. Table 5 shows
the actions allowed during each mode.
Mode 0
1.
Flctl SFR (0xB2 bit 6) is already set in the current flash program.
2.
Setup the Fuse Control Register.
3.
Setup the Security Ctl Register.
4.
Enable the Trim Pulse Ctl Register
After Mode 0 is executed, a full circuit reset must be done for mode 0 to be in effect.
Mode 1
1.
SEC (JP15 on EVB) bit set to HI.
2.
Setup the Fuse Control Register.
3.
Setup the Security Ctl Register.
4.
Enable the Trim Pulse Ctl Register
Mode 2
This mode is strictly firmware and is implemented at the application level by calling the SetPassCode ( ) API.
1.
If the Passcode is valid and has been modified less than 8 times, the application should loop through
to exhaust the number of times the passcode change is allowed.
2.
Scramble the last passcode with an invalid value then write it to the last designated location of the
passcode. The TSC Pseudo-CCID for Serial RS-232 release contains application source code that
demonstrates this mode. Please contact a Teridian Sales Representative for a copy.
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