73S12xxF Software User Guide
UG_12xxF_016
8
Rev. 1.50
CCIDTSC-*.sys/CCIDTSC-*.inf – Teridian Windows Drivers.
ccidusb-*.hex – an embedded application used for USB CCID communications with Windows or
Linux OS. This embedded program can be used with either Microsoft’s generic USB driver or the
Teridian driver.
ccidrs232.hex – an embedded application used for RS232/Serial communications with a host
running Windows OS.
CCID-USB.exe – a PC application written in C# to be used in conjunction with the CCIDTeridian.sys
USB driver with the evaluation board programmed with the CCIDUSB-*.hex firmware.
Low-level API Library – an embedded flash module that provides low-level APIs (physical layer) to
control the 73S12xxF.
High-level API Library – an embedded flash module at the protocol level that provides APIs to control
different features of the Smart Card. EMV Level I protocol layer is implemented within this module.
Include/header files for both the Low-level API and the High-level API libraries.
Sample code for Serial’s Pseudo CCID protocol. For the USB interface, the USB CCID firmware
source code is also included.
Linux driver for USB CCID and Linux Application for USB DFU interface.
2.2
Software Build Environment
Install the Keil compiler and select all default options (recommended). When prompted for a target
device, select TSC-73S12xxF. This option may not be available on older versions of the compiler. In this
case, select TSC 73M6513. For development, an upgrade to a newer version of the Keil compiler is
highly recommended. This option can be changed at any time by:
Under ‘Project’ – ‘Select Device for target ‘Target1’ ‘– CPU tab’ – scroll down to TDK Semiconductor
(with older version of Keil) or Teridian Semiconductor (available with newer version of Keil) – select
either 71M6513 or 73S12xx.
Under ‘Project’ – ‘Options for target ‘target1’’ – Target tab – Xdata memory field, the RAM start
address should be set to 0x0000, and RAM size should be set to 0x0800.
2.2.1
Software Architecture
The 73S12xxF software architecture is partitioned into three separate layers:
The Low-level API (LAPI) device or physical layer, which contains a set of function calls to directly
manage the peripherals and CPU management (such as clock, timing, power saving, etc.).
The second layer is the High-level API (HAPI), which is essentially the protocol layer. It provides
functions for communication with the smart card (ICC).
The third layer is the application layer. This layer is left for the application software developer to
design any suitable smart card reader applications.
Figure 1 shows the partitions for each software component and its approximate memory size. As
illustrated, there are many different ways an application can be designed and implemented. Section 4 Design Reference describes the API functions within each component in more detail. The embedded
application sample source code for most of the main features of the chip is provided in the release.