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| 型號： | 73S1217F-EB-LITE |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/93頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL 73S1217F CBL/DOC/CD |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 系列： | * |
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UG_12xxF_016
73S12xxF Software User Guide
Rev. 1.50
17
3
Testing Environment
Teridian performs conformance and certification testing to verify both the 73S12xxF IC (hardware and
electrical) and libraries (protocol, timing and application firmware and drivers). These tests are dictated
by specific standards. Each standard has a specific set of hardware and software configuration
requirements. This section describes the protocol portion of the testing that has been performed.
3.1
EMV Level I Compliant Testing
This section describes the EMV Level I compliant protocol testing. EMV Level I Electrical testing is
beyond the scope of this document.
Depending on the accredited test labs, EMV Level I compliant protocol testing can be done using either a
Visa or a MasterCard test suite under the Payment System Environment (PSE). Each test environment
has its own setup/configuration and selected tests for each setup.
For example, in the MasterCard test suite, there are a few configurable choices that must be considered.
Each answer to these six questions would require a different test setup and expected behavior of the
reader. The true/false answers shown after the questions below were selected for Teridian’s EMV Level I
compliant testing.
Terminal supports parameters negotiation technique: (true/false) - true
Terminal deactivates after I-Block with LEN = 0xFF: (true/false) - true
Terminal supports resynchronization: (true/false) - false
Terminal deactivates after BWT excess: (true/false) - true
Terminal deactivates after CWT excess: (true/false) - true
Terminal sends S(Abort Response): (true/false) – false
The EMV Level I Master Card test suite was performed by both an independent/accredited test lab and
by Teridian’s internal test lab. The testing was done using internal slot (slot #1) and all internal EMV
Level I tests passed.
EMV Level I formal compliant test at an accredited lab (Cetecom) is in progress.
3.2
CCID Testing
The 73S12xxF part provides two control interfaces to the host: USB and Serial/RS232. Using either of
these bus types, a command can be sent from the host to the chip to control the Smart Card. Because
of this control interface, testing under the CCID Specification usually involves two parts: Smart Card and
Bus type (USB or Serial/RS232).
3.2.1
USB Testing: Microsoft HCT/DTM, and USB Command Verifier
Teridian used three different tests to verify USB CCID compliance:
1.
Microsoft Hardware Compatibility Test (HCT) for Windows Logo or their updated test suite: Device
Test Manager for Vista and Windows XP, which tests CCID and PC/SC compliances.
2.
USB 2.0 Chapter 9 Test (USB Command Verifier Test).
3.
Linux Driver test using the available smart card test tool downloaded from the internet.
The HCT/DTM Smart Card test was completed in-house using the IFDTest.exe that came with HCT
version 12.01.1. (Note: This test still requires the use of older PC/SC test cards that are no longer
available for purchase) At this release, the two Vista drivers have been certified with Microsoft. The ad-
hoc testing was performed using both the TSC USB driver and the Microsoft generic USB CCID driver.
The DTM test was run and certified with Microsoft using only the TSC customized driver.
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