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IDT Serial Peripheral Interface
Master Programming Example
79RC32438 User Reference Manual
16 - 10
November 4, 2002
Notes
Master Programming Example
SPI Initialization
1. If the PCI interface is configured to operate in PCI satellite mode with suspended CPU execution,
wait until PCI Serial EEPROM Done (EED) bit is set in the PCIS register.
2. Based on operating IPBus clock frequency and desired SPI clock frequency, write SPCP register
(i.e., 0x0C for 100 MHz IPBus clock, 2 MHz SPI clock and SPR = 0 in SPC).
3. Write SPIC register with 0x0000_00D0. SPIE = 1 - Interrupt enable, SPE = 1 - Enable interface,
MSTR = 1 - Master mode, SPOL = 0 - Idle clock polarity low, CPHA = 0 - Data clocked on first edge,
SPR = 0 - Clock divisor is 2.
4. Write IMASK6 register to disable GPIO Interrupt, GPIOx = 0, where "x" is used GPIO pin for SPI chip
select. If you have more than one device, disable all interrupts for used GPIO pins.
5. Write GPIOFUNC register to set GPIOx = 0 — not alternate function.
6. Write GPIOCFG register to set GPIOx = 1 — output.
7. Write GPIOD register to de-assert chip select(s) GPIOx = 1.
8. Read SPS and then SPD to clear SPIF bit.
9. Write IMASK5 register SPI = 0 — enable SPI interrupts.
Read Value:
Previous value written
Write Effect:
Modify value
SDI
Description:
Serial Data Input.
Reading this bit returns the state of the SDI pin. Writing a value to this bit
causes the SDI pin to take on the corresponding value if it is configured to be a bit I/O output port
in the SIOFUNC and SIOCFG registers.
Initial Value:
SDI pin value
Read Value:
Previous value written
Write Effect:
Modify value
SCK
Description:
Serial Clock.
Reading this bit returns the state of the SCK pin. Writing a value to this bit causes
the SCK pin to take on the corresponding value if it is configured to be a bit I/O output port in the
SIOFUNC and SIOCFG registers.
Initial Value:
SCK pin value
Read Value:
Previous value written
Write Effect:
Modify value
PCI
Description:
PCI Chip Select.
Reading this bit returns the state of the PCIGNTN[1] pin. Writing a value to this
bit causes the PCIGNTN[1] pin to take on the corresponding value if it is configured to be a bit
I/O output port in the SIOFUNC and SIOCFG registers and the PCI interface is operating in PCI
satellite mode.
Initial Value:
PCIGNTN[1] pin value
Read Value:
Previous value written
Write Effect:
Modify value