82801BA ICH2
Datasheet
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12-1
12-2
13-1
13-2
13-3
14-1
14-2
14-3
15-1
16-1
16-2
16-3
16-4
16-5
16-6
16-7
16-8
16-9
16-10
16-11
16-12
16-13
16-14
16-15
16-16
16-17
16-18
16-19
17-1
17-2
17-3
PCI Configuration Registers (SMBUS—D31:F3)........................................12-1
SMB I/O Registers......................................................................................12-5
PCI Configuration Map (Audio—D31:F5)....................................................13-1
ICH2 Audio Mixer Register Configuration...................................................13-7
Native Audio Bus Master Control Registers................................................13-9
PCI Configuration Map (Modem—D31:F6).................................................14-1
ICH2 Modem Mixer Register Configuration................................................14-7
Modem Registers........................................................................................14-8
ICH2 EBGA Ball List...................................................................................15-4
D.C. Current Characteristics (ICH2 Power Consumption Measurements) .16-2
DC Characteristic Input Signal Association ................................................16-2
DC Input Characteristics.............................................................................16-3
DC Characteristic Output Signal Association..............................................16-4
DC Output Characteristics..........................................................................16-5
Other DC Characteristics............................................................................16-6
Clock Timings .............................................................................................16-7
PCI Interface Timing...................................................................................16-9
IDE PIO & Multiword DMA Mode Timing ..................................................16-10
Ultra ATA Timing (Mode 0, Mode 1, Mode 2)...........................................16-11
Ultra ATA Timing (Mode 3, Mode 4, Mode 5)...........................................16-11
Universal Serial Bus Timing......................................................................16-12
IOAPIC Bus Timing...................................................................................16-13
SMBus Timing...........................................................................................16-13
AC’97 Timing ............................................................................................16-13
LPC Timing...............................................................................................16-13
Miscellaneous Timings..............................................................................16-14
Power Sequencing and Reset Signal Timings..........................................16-14
Power Management Timings....................................................................16-15
Test Mode Selection...................................................................................17-1
XOR Test Pattern Example.........................................................................17-2
XOR Chain #1 (RTCRST# Asserted for 4 PCI Clocks while
PWROK Active) ..........................................................................................17-4
XOR Chain #2 (RTCRST# Asserted for 5 PCI clocks while
PWROK Active) ..........................................................................................17-5
XOR Chain #3 (RTCRST# Asserted for 6 PCI Clocks while
PWROK Active) ..........................................................................................17-6
XOR Chain #4 (RTCRST# Asserted for 7 PCI Clocks while
PWROK Active) ..........................................................................................17-7
Signals Not in XOR Chain...........................................................................17-8
ICH2 Fixed I/O Registers............................................................................. A-1
ICH2 Variable I/O Registers......................................................................... A-6
17-4
17-5
17-6
17-7
A-1
A-2
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