參數(shù)資料
型號(hào)： 82C931
廠商： Electronic Theatre Controls, Inc.
英文描述： Plug and Play Integrated Audio Controller
中文描述： 即插即用集成音頻控制器
文件頁(yè)數(shù)： 51/64頁(yè)
文件大小： 634K
代理商： 82C931
82C931
912-3000-035
Revision: 2.1
Page 43
OPTi
CIR15
Playback Lower Base Count Register
Lower Base Count:
Default = 00h
This byte is the lower byte of the base count register containing the eight least significant bits of the 16-bit base register.
Reads from this register return the same value which was written The current count contained in the counters can not be read.
When enabled for SD Mode, this register is used for both the Playback and Capture Base Registers.
Table 5-10
Codec Indirect Registers (cont.)
D7
D6
D5
D4
D3
D2
D1
D0
Table 5-11
Expanded Mode CIR
7
6
5
4
3
2
1
0
CIR16
AUXL Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for AUXL (dB):
Refer to CIR2[4:1] for decode.
Reserved
CIR17
AUXR Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for AUXR (dB):
Refer to CIR2[4:1] for decode.
Reserved
CIR18
LINEL Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for LINEL (dB):
Refer to CIR2[4:1] for decode.
Reserved
CIR19
LINER Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
Reserved
Gain select for LINER inputs (dB):
Refer to CIR2[4:1] for decode.
Reserved
CIR20
MICL Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
MICR mixed
into OUTL:
0 = Disable
1 = Enable
Reserved
Gain select for MICL (dB):
Refer to CIR2[4:1] for decode.
Reserved
CIR21
MICR Input Control Register
Default = 88h
Mute:
0 = Disable
1 = Enable
MICL mixed
into OUTR:
0 = Disable
1 = Enable
Reserved
Gain select for MICR (dB):
Refer to CIR2[4:1] for decode.
Reserved
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