參數(shù)資料
型號(hào): 97022-99
廠商: PEREGRINE SEMICONDUCTOR CORP
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 300 MHz, UUC
封裝: DIE
文件頁(yè)數(shù): 14/15頁(yè)
文件大小: 566K
代理商: 97022-99
Product Specification
PE97022
Page 8 of 15
2007-2010 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0235-05
│ UltraCMOS RFIC Solutions
Functional Description
The PE97022 consists of a prescaler, counters, a
phase detector, and control logic. The dual
modulus prescaler divides the VCO frequency by
either 10 or 11, depending on the value of the
modulus select. Counters “R” and “M” divide the
reference and prescaler output, respectively, by
integer values stored in a 20-bit register. An
additional counter (“A”) is used in the modulus
select logic. The phase-frequency detector
generates up and down frequency control signals.
The control logic includes a selectable chip
interface. Data can be written via serial bus,
parallel bus, or hardwired directly to the pins.
There are also various operational and test modes
and a lock detect output.
Figure 6. Functional Block Diagram
Control
Logic
R Counter
(6-bit)
Phase
Detector
fc
PD_U
PD_D
LD
R(5:0)
M(8:0)
A(3:0)
D(7:0)
Sdata
Control
Pins
fr
Modulus
Select
10/11
Prescaler
M Counter
(9-bit)
Cext
fp
Fin
相關(guān)PDF資料
PDF描述
97022-01 PLL FREQUENCY SYNTHESIZER, 300 MHz, CQCC44
97042-01 PHASE LOCKED LOOP, CQCC44
97042-11 PHASE LOCKED LOOP, 300 MHz, CQCC44
97042-99 PHASE LOCKED LOOP, 300 MHz, UUC
97050-1020 PZA320, IC SOCKET
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