參數(shù)資料
型號： A0800AMS3C
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 800 MHz, MICROPROCESSOR, CPGA462
封裝： STAGGERED, CERAMIC, PGA-453
文件頁數(shù)： 81/90頁
文件大?。?/td> 1492K
代理商： A0800AMS3C
68
Pin Descriptions
Chapter 10
AMD Athlon Processor Model 4 Data Sheet
23792H—March 2001
Preliminary Information
For more information, see the “Required Circuits” chapter of
the Socket A Motherboard Design Guide, order# 24363.
VREFSYS Pin
VREFSYS (W5) drives the threshold voltage for the system bus
input receivers. The value of VREFSYS is system specific. In
addition, to minimiz e VCC_CORE noise rejection from
V R E F S Y S , in clu d e d e co up lin g ca p a cit o r s . Fo r m o re
information, see the Socket A Motherboard Design Guide, order#
24363.
ZN, VCC_Z, ZP, and
VSS_Z Pins
ZN (AC5), VCC_Z (AC7), ZP (AE5), and VSS_Z(AE7) are the
pus h-pul l compen sation ci rcui t pin s. VCC_ Z i s tied to
VCC_CORE. VSS_Z is tied to VSS.
In Push-Pull mode (selected by the SIP parameter SysPushPull
asserted), ZN is tied to VCC_CORE with a resistor that has a
resistance matching the impedance Z0 of the transmission line.
ZP is tied to VSS with a resistor that has a resistance matching
the impedance Z0 of the transmission line.
Table 19. VID[4:0] Code to Voltage Definition
VID[4:0]
VCC_CORE (V)
VID[4:0]
VCC_CORE (V)
00000
1.850
10000
1.450
00001
1.825
10001
1.425
00010
1.800
10010
1.400
00011
1.775
10011
1.375
00100
1.750
10100
1.350
00101
1.725
10101
1.325
00110
1.700
10110
1.300
00111
1.675
10111
1.275
01000
1.650
11000
1.250
01001
1.625
11001
1.225
01010
1.600
11010
1.200
01011
1.575
11011
1.175
01100
1.550
11100
1.150
01101
1.525
11101
1.125
01110
1.500
11110
1.100
01111
1.475
11111
No CPU
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