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| 型號： | A1400AMT3C |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1400 MHz, MICROPROCESSOR, CPGA453 |
| 封裝： | STAGGERED, CERAMIC, PGA-453 |
| 文件頁數(shù)： | 16/90頁 |
| 文件大?。?/td> | 1497K |
| 代理商： | A1400AMT3C |
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Chapter 4
Power Management
9
23792I—June 2001
AMD Athlon Processor Model 4 Data Sheet
Preliminary Information
4
Power Management
4.1
Power Management States
The AMD Athlon Processor Model 4 supports low-power Halt
and Stop Grant states. These states are used by Advanced
Configuration and Power Interface (ACPI) enabled operating
systems for processor power management. Figure 3 shows the
power management states of the AMD Athlon Processor Model
4. The figure includes the ACPI “Cx” naming convention for
these states.
Figure 3. AMD Athlon Processor Model 4 Power Management States
C1
Halt
C0
Working
Execute HLT
SMI#, INTR, NMI, INIT#, RESET#
In
co
m
ing
Pr
ob
e
Pr
ob
e
Se
rv
ice
d
STP
C
LK
#
asser
ted
STP
CLK
# as
serte
d 2
STP
CLK
# d
eass
erte
d 3
C2
Stop Grant
Cache Snoopable
Incoming Probe
Probe Serviced
Probe
State1
ST
PC
LK
#
de
as
se
rt
ed
(R
ead
P
LVL
2
regi
st
er
or
th
ro
ttl
in
g)
C3/S1
Stop Grant
Cache Not Snoopable
Sleep
STP
CLK
#
asse
rted
STP
CLK
#
dea
sser
ted
Legend:
Hardware transitions
Software transitions
Legend:
Hardware transitions
Software transitions
The AMD System Bus is connected during the following states:
1) The Probe state
2) During transitions from Halt state to Stop Grant state
3) Stop Grant state to the Halt state
S1
4) The C0 Working State
4
2) During transitions from the Halt state to the Stop Grant state
3) During transitions from Stop Grant state to the Halt State
The AMD Athlon System Bus is connected during the following states:
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