參數(shù)資料
型號(hào)： a8251
廠(chǎng)商： Altera Corporation
英文描述： Programmable Communications Interface(可編程通信接口)
中文描述： 可編程通信接口（可編程通信接口）
文件頁(yè)數(shù)： 11/21頁(yè)
文件大小： 338K
代理商： A8251
Altera Corporation
35
a8251 Programmable Communications Interface Data Sheet
Receiver Operation (Asynchronous)
When the
a8251
is programmed for asynchronous operation, the receiver
includes the following functions:
I
I
I
I
I
I
Start bit detection
Data bit sampling
Parity/stop bit detection
Error detection
Receiver buffer register transfer
Break detection
Start Bit Detection
The
a8251
begins receiving data when a start bit is detected. A start bit is
a logic low on the
rxd
input, which is sampled on each rising clock edge
of the
nrxc
signal. Once the
a8251
detects a logic low, it begins counting
the number of logic low samples according to the specified divide-by
mode.
Table 10. a8251 Programming Sequence
cnd
nrd
nwr
ncs
Operation
Comment
1
1
0
0
Microprocessor writes to the MIR.
Must occur immediately following a total
state reset or internal state reset.
Skipped in asynchronous operation.
1
1
0
0
Microprocessor writes the first sync
character.
Microprocessor writes the second
sync character.
1
1
0
0
Skipped in asynchronous operation or if
bit 7 of the MIR (synchronous operation)
is set to a logic high.
Random access.
1
1
0
0
Microprocessor writes to the
command instruction register.
Microprocessor writes to the TBR.
Microprocessor reads the status
register.
Microprocessor reads the RBR.
0
1
1
0
0
1
0
0
Random access.
Random access.
0
0
1
0
Random access.
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