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參數(shù)資料
| 型號(hào)： | AD9736-DPG2-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 47/72頁(yè) |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9736 |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 設(shè)計(jì)資源： | AD9736-DPG2-EBZ Schematic AD9736-DPG2-EBZ BOM AD9736-DPG2-EBZ Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 1.2G |
| 數(shù)據(jù)接口： | 并聯(lián) |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9736 |
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AD9734/AD9735/AD9736
Rev. A | Page 51 of 72
DAC OUTPUT DISTORTION SOURCES
The second harmonic is mostly due to an imbalance in the
output load. The dc transfer characteristic of the DAC is capable
of second harmonic distortion of at least 75 dBc. Output load
imbalance or digital data noise coupling onto DACCLK causes
additional second harmonic distortion.
The DAC architecture inherently generates third harmonics, the
levels of which depend on the output frequency and amplitude
generated. If any output signal is rectified and coupled back
onto the DAC clock, it can generate additional third-harmonic
energy.
The distortion components should be identical in amplitude
and phase at both AD973x outputs. Even though each single-
ended output includes a large amount of second-harmonic
energy, a careful differential-to-single-ended conversion can
remove most of it. Optimum performance at high intermediate
frequency (IF) output is obtained with the output circuit shown
in Figure 93.
This is the configuration implemented on the evaluation board
(Figure 107). The 20 Ω series resistors allow the DAC to drive a
less reactive load, which improves distortion. Further improvement
is realized by adding the Balun T3 to help provide an equal load
to both DAC outputs.
04862-091
IOUTA
IOUTB
J2, 50
Ω OUTPUT
AVSS
R17
20
Ω
15
6
5
1
34
4
3
R19
20
Ω
T3
T1
AVSS
R8
50
Ω
R6
50
Ω
Figure 93. IF Signal Output Circuit
Because T1 has a differential input, but a single-ended output,
Pin 4 of T1 has a higher capacitance to ground due to parasitics
to Pin 3. T1 Pin 6 has lower parasitic capacitance to ground
because it drives 50 Ω at Pin 1. This presents an unbalanced
load to the DAC output, so T3 is added to improve the load
balancing. Refer to Figure 107 for the transformer part numbers.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9736-EB | 制造商:Analog Devices 功能描述:14-BIT, 1.2 GSPS TXDAC+? D/A CONVERTER - Bulk |
| AD9736-EBZ | 制造商:Analog Devices 功能描述:EVAL BD FOR AD9735 DAC, 10-/12-/14BIT, 1200 MSPS DACS - Bulk |
| AD9736XBC | 制造商:Analog Devices 功能描述:14-BIT 1600 MSPS D/A CONVERTER - Bulk |
| AD9737A | 制造商:AD 制造商全稱:Analog Devices 功能描述:11-/14-Bit, 2.5 GSPS |
| AD9737ABBCZ | 功能描述:IC DAC 11BIT 2.5GSPS RF 160BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
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