參數(shù)資料
型號: AD9736-DPG2-EBZ
廠商: Analog Devices Inc
文件頁數(shù): 57/72頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9736
產(chǎn)品培訓(xùn)模塊: DAC Architectures
設(shè)計(jì)資源: AD9736-DPG2-EBZ Schematic
AD9736-DPG2-EBZ BOM
AD9736-DPG2-EBZ Gerber Files
標(biāo)準(zhǔn)包裝: 1
DAC 的數(shù)量: 1
位數(shù): 14
采樣率(每秒): 1.2G
數(shù)據(jù)接口: 并聯(lián)
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD9736
AD9734/AD9735/AD9736
Rev. A | Page 60 of 72
S
P
SP
VSSA
6
5
3
4
2
1
4
3
6
J2
R4
300
Ω
3
1
5
4
415mV
C
O
M
O
N
MODE
VOLTAGE
400mV
p
–p
NOTE
:
T1
,T3
,AND
T3
B
ARE
INS
TALLE
D,
R6
AND
R8
=
5
0Ω,
R7
=
DNP
R1
7
AND
R1
9
=
2
0Ω,
R161
AND
R162
=
0
Ω,
J
U
MP
E
R
ADDE
D
FROM
T1
P
IN
3
TO
T1
P
IN
2
ON
THE
RE
V
.C
E
V
A
L
BOARD.
J1 VSSA
;3
,4,5
SM
A
200U
P
VSSA
T3A
T3B
T3
ADT
L
1
–12X
X
E
T
C1–1
–13
S
P
NC=2
E
T
C1–1–
13
E
T
C1–1
–13
T2
ADT
2
–1T
–1P
4
5
1
3
P
S
NC=2
C3
5
C3
6
0.1
μF
0.1
μF
CC0603
R2
0
R2
1
R3
1k
Ω
R6
50
Ω
C2
6
DNP
C2
7
DNP
C3
8
1nF
C2
9
1nF
C2
8
0.1
μF
CLKP
CLKN
V
DDC
VSSA
25
Ω
25
Ω
RC0603
R7
DNP
R1
7
20
Ω
R
161
0Ω
R
162
0Ω
R1
8
DNP
R1
9
20
Ω
RC0603
R8
50
Ω
RC0603
AN
LV
DS
S
IGNAL
MAY
BE
US
E
D
TO
DRIV
E
C3
5
AND
C3
6
IF
R2
0
AND
R2
1
ARE
INCRE
AS
E
D
TO
5
0Ω
E
ACH.
R1
7
AND
R1
9
CAN
BE
RE
MOV
E
D
AND
T1
RE
P
LACE
D
WITH
A
1
:1
TRANS
FORME
R
FOR
HIGHE
R
OUTP
UT
AMP
LITUDE
IF
MORE
H2
IS
ACCE
P
TABLE
(TY
P
ICALLY
AT
LOWE
R
F
OUT
).
R17
AND
R19
PRESENT
A
MORE
RE
AL
LOAD
TO
THE
DAC
WHICH
IMP
R
OV
E
S
H2
P
E
R
FORMANCE
.
T2
AND
T4
B
ARE
NOT
P
O
P
U
LATE
D
T1
:MINI-CIRCUITS
–3dB
:8-
600M
H
z
–1dB
:13-
300M
H
z
THIS
CONFIGURATION
P
R
OV
IDE
S
OP
TIMUM
AC
P
E
R
FORMANCE
FOR
IF
S
IGNAL
GE
NE
RATION.
TYPIC
A
L
SIGN
A
L
LEVELS
SH
OW
N
FOR
50
Ω
LOAD.
VSSA
IN
IP
T3
:M/
A-CO
M
–1dB
:4.5-
1000M
H
z
SP
6
5
3
4
2
1
T4B
T1
ADT2
–1T–
1P
4
5
3
1
P
S
NC=2
VSSA
;3
,4,5
SM
A
200U
P
04862–105
T3A
IS
NOT
POPULATED
Figure 107. Clock Input and Analog Output, AD973x Evaluation Board, Rev. F
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