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參數(shù)資料
型號： AD9739A-FMC-EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 54/64頁
文件大?。?/td> 0K
描述： BOARD EVAL W/FMC CONN FPGA DEV
設(shè)計資源： AD9739A-FMC-EBZ Gerber Files
AD9739A-FMC-EBZ Layout
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC®
DAC 的數(shù)量： 1
位數(shù)： 14
采樣率（每秒）： 2.5G
數(shù)據(jù)接口： 串行，SPI?
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9739A
AD9737A/AD9739A
Data Sheet
Rev. | Page 58 of 64
The code-dependent current measured at the IOUTP and
IOUTN outputs is as follows:
IOUTP = 17/32 × IOUTFS + 15/32 × IOUTFS × F(Code)
(4)
IOUTN = 17/32 × IOUTFS 15/32 × IOUTFS × F(Code)
(5)
Figure 179 shows the IOUTP vs. DACCODE transfer function
when IOUTFS is set to 19.65 mA.
20
18
10
12
14
16
O
UT
P
UT
CURRE
NT
(mA)
8
6
4
2
0
4096
8192
12,288
DAC CODE
16,384
09616-
098
Figure 179. Gain Curve for FSC[9:0] = 512, DAC OFFSET = 1.228 mA
Peak DAC Output Power Capability
The maximum peak power capability of a differential current
output DAC is dependent on its peak differential ac current, IPEAK,
and the equivalent load resistance it sees. Because the AD9737A/
AD9739A include a differential 70 Ω resistance, it is best to use
a doubly terminated external output network similar to what is
shown in Figure 181. In this case, the equivalent load seen by
the ac current source of the DAC is 25 Ω.
If the AD9737A/AD9739A are programmed for IOUTFS = 20 mA,
the peak ac current is 9.375 mA and the peak power delivered to
the equivalent load is 2.2 mW (that is, P = I2R). Because the source
and load resistance seen by the 1:1 balun are equal, this power is
shared equally; therefore, the output load receives 1.1 mW or
0.4 dBm.
To calculate the rms power delivered to the load, the following
must be considered:
Peak-to-rms of the digital waveform
Any digital backoff from digital full scale
The DAC’s sinc response and nonideal losses in external
network
For example, a reconstructed sine wave with no digital backoff
ideally measures 2.6 dBm because it has a peak-to-rms ratio of
3 dB. If a typical balun loss of 0.4 dBm is included, 3 dBm of
actual power can be expected in the region where the sinc response
of the DAC has negligible influence. Increasing the output
power is best accomplished by increasing IOUTFS, although any
degradation in linearity performance must be considered
acceptable for the target application.
IPEAK =
15/32 × IOUTFS
AC
70
IOUTFS = 8.6 – 31.2mA
180
RLOAD
= 50
RSOURCE
= 50
LOSSLESS
BALUN
1:1
09616-
099
Figure 180. Equivalent Circuit for Determining Maximum Peak Power
to a 50 Ω Load
C
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