參數(shù)資料
型號: AD9776BSVZRL
廠商: Analog Devices Inc
文件頁數(shù): 24/56頁
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL 1GSPS 100TQFP
產(chǎn)品培訓模塊: DAC Architectures
標準包裝: 1,000
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 300mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應商設備封裝: 100-TQFP-EP(14x14)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 1G
AD9776/AD9778/AD9779
Rev. A | Page 30 of 56
Address
Register Name
Reg. No.
Bits
Description
Function
Default
Q DAC Control Register
0F
7:0
Q DAC gain adjustment
(7:0) LSB slice of 10-bit gain setting word for
Q DAC
11111001
10
7
Q DAC sleep
0: Q DAC on
0
1: Q DAC off
10
6
Q DAC power-down
0: Q DAC on
0
1: Q DAC off
10
1:0
Q DAC gain adjustment
(9:8) MSB slice of 10-bit gain setting word
for Q DAC
11
7:0
Aux DAC2 gain adjustment
(7:0) LSB slice of 10-bit gain setting word for
Aux DAC2
00000000
12
7
Aux DAC2 sign
0: positive
1: negative
12
6
Aux DAC2 current direction
0: source
0
1: sink
12
5
Aux DAC2 power-down
0: Aux DAC2 on
0
1: Aux DAC2 off
Aux DAC2 Control
Register
12
1:0
Aux DAC2 gain adjustment
(9:8) MSB slice of 10-bit gain setting word
for Aux DAC2
00
Interrupt Register
19
7
0
19
6
Sync delay IRQ
Readback, must write 0 to clear
0
19
5
0
19
3
0
19
2
Sync delay IRQ enable
0
19
1
0
19
0
Internal sync loopback
0
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