參數(shù)資料
型號(hào): AD9776BSVZRL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/56頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL 1GSPS 100TQFP
產(chǎn)品培訓(xùn)模塊: DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 300mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 1G
AD9776/AD9778/AD9779
Rev. A | Page 13 of 56
74
VREF
73
IPTAT
72
AGND
69
CSB
70
RESET
71
IRQ
75
I120
68
SCLK
67
SDIO
66
SDO
64
DGND
63
SYNC_O+
62
SYNC_O–
61
DVDD33
60
DVDD18
59
P2D<0>
58
P2D<1>
57
P2D<2>
56
P2D<3>
55
P2D<4>
54
DGND
53
DVDD18
52
P2D<5>
51
P2D<6>
65
PLL_LOCK
PIN 1
100
AV
DD3
3
99
AGND
98
AV
DD3
3
97
AGND
96
AV
DD3
3
95
AGND
94
AGND
93
OU
T1_P
92
OU
T1_N
91
AGND
90
AUX
1
_
P
89
AUX
1
_
N
88
AGND
87
AUX
2
_
N
86
AUX
2
_
P
85
AGND
84
OU
T2_N
83
OU
T2_P
82
AGND
81
AGND
80
AV
DD3
3
79
AGND
78
AV
DD3
3
77
AGND
76
AV
DD3
3
26
P1D
<
8>
27
P1D
<
7>
28
P1D
<
6>
29
P1D
<
5>
30
P1D
<
4>
31
P1D
<
3>
32
DGND
33
DV
DD1
8
34
P1D
<
2>
35
P1D
<
1>
36
P1D
<
0>
37
DATACLK
38
DV
DD3
3
39
TX
E
NABLE
40
P2D
<
15>
41
P2D
<
14>
42
P2D
<
13>
43
DV
DD1
8
44
DGND
45
P2D
<
12>
46
P2D
<
11>
47
P2D
<
10>
48
P2D
<
9>
49
P2D
<
8>
50
P2D
<
7>
2
CVDD18
3
CGND
4
CGND
7
CGND
6
CLK–
5
CLK+
1
CVDD18
8
CGND
9
CVDD18
10
CVDD18
12
AGND
13
SYNC_I+
14
SYNC_I–
15
DGND
16
DVDD18
17
P1D<15>
18
P1D<14>
19
P1D<13>
20
P1D<12>
21
P1D<11>
22
DGND
23
DVDD18
24
P1D<10>
25
P1D<9>
11
CGND
AD9779
TOP VIEW
(Not to Scale)
ANALOG DOMAIN
DIGITAL DOMAIN
05361-004
Figure 5. AD9779 Pin Configuration
Table 8. AD9779 Pin Function Descriptions
Pin
No.
Mnemonic
Description
1
CVDD18
1.8 V Clock Supply.
2
CVDD18
1.8 V Clock Supply.
3
CGND
Clock Common.
4
CGND
Clock Common.
5
CLK+1
Differential Clock Input.
6
Differential Clock Input.
7
CGND
Clock Common.
8
CGND
Clock Common.
9
CVDD18
1.8 V Clock Supply.
10
CVDD18
1.8 V Clock Supply.
11
CGND
Clock Common.
12
AGND
Analog Common.
13
SYNC_I+
Differential Synchronization Input.
14
SYNC_I
Differential Synchronization Input.
15
DGND
Digital Common.
16
DVDD18
1.8 V Digital Supply.
17
P1D<15>
Port 1, Data Input D15 (MSB).
18
P1D<14>
Port 1, Data Input D14.
19
P1D<13>
Port 1, Data Input D13.
20
P1D<12>
Port 1, Data Input D12.
21
P1D<11>
Port 1, Data Input D11.
Pin
No.
Mnemonic
Description
22
DGND
Digital Common.
23
DVDD18
1.8 V Digital Supply.
24
P1D<10>
Port 1, Data Input D10.
25
P1D<9>
Port 1, Data Input D9.
26
P1D<8>
Port 1, Data Input D8.
27
P1D<7>
Port 1, Data Input D7.
28
P1D<6>
Port 1, Data Input D6.
29
P1D<5>
Port 1, Data Input D5.
30
P1D<4>
Port 1, Data Input D4.
31
P1D<3>
Port 1, Data Input D3.
32
DGND
Digital Common.
33
DVDD18
1.8 V Digital Supply.
34
P1D<2>
Port 1, Data Input D2.
35
P1D<1>
Port 1, Data Input D1.
36
P1D<0>
Port 1, Data Input D0 (LSB).
37
DATACLK
Data Clock Output.
38
DVDD33
3.3 V Digital Supply.
39
TXENABLE
Transmit Enable.
40
P2D<15>
Port 2, Data Input D15 (MSB).
41
P2D<14>
Port 2, Data Input D14.
42
P2D<13>
Port 2, Data Input D13.
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