R
參數(shù)資料
型號(hào)： ADF4193WCCPZ-RL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 27/32頁(yè)
文件大?。?/td> 0K
描述： IC PLL FREQ SYNTHESIZER 32LFCSP
標(biāo)準(zhǔn)包裝： 1,500
類型： 時(shí)鐘/頻率合成器，RF
PLL： 是
輸入： CMOS，TTL
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 2:1
差分 - 輸入:輸出： 是/無(wú)
頻率 - 最大： 3.5GHz
除法器/乘法器： 是/是
電源電壓： 2.7 V ~ 3.3 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 32-LFCSP-VQ
包裝： 帶卷 (TR)
ADF4193
Data Sheet
Rev. F | Page 4 of 32
Parameter
B Version1
CVersion2
Unit
Test Conditions/Comments
SW1, SW2, and SW3
RON (SW1 and SW2)
65
typ
RON SW3
75
typ
NOISE CHARACTERISTICS
Output
900 MHz4
108
dBc/Hz typ
At 5 kHz offset and 26 MHz PFD frequency
1800 MHz5
102
dBc/Hz typ
At 5 kHz offset and 13 MHz PFD frequency
Phase Noise
Normalized Phase Noise
Floor (PNSYNTH)6
216
dBc/Hz typ
At VCO output with dither off, PLL loop
bandwidth = 500 kHz
Normalized 1/f Noise (PN1_f)7
110
dBc/Hz typ
Measured at 10 kHz offset, normalized to 1 GHz
1
Operating temperature range is from 40°C to +85°C.
2
Operating temperature range is from 40°C to +105°C
3
The prescaler value is chosen to ensure that the RF input is divided down to a frequency that is less than this value.
4
fREFIN = 26 MHz; fSTEP = 200 kHz; fRF = 900 MHz; loop bandwidth = 40 kHz.
5
fREFIN = 13 MHz; fSTEP = 200 kHz; fRF = 1800 MHz; loop bandwidth = 60 kHz.
6
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log(N) (where N is the N divider
value) and 10 log(fPFD). PNSYNTH = PNTOT 10 log(fPFD) 20 log(N).
7
The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency,
fRF, and at an offset frequency, f, is given by PN = P1_f+ 10 log(10 kHz/f) + 20 log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in
ADIsimPLL.
TIMING CHARACTERISTICS
AVDD = DVDD = 3 V ± 10%, VP1, VP2 = 5 V ± 10%, VP3 = 5.35 V ± 5%, AGND = DGND = GND = 0 V, RSET = 2.4 k, dBm referred to
50 , TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Limit (B Version)1
Limit (C Version) 2
Unit
Test Conditions/Comments
t1
10
ns min
LE setup time
t2
10
ns min
DATA to CLOCK setup time
t3
10
ns min
DATA to CLOCK hold time
t4
15
ns min
CLOCK high duration
t5
15
ns min
CLOCK low duration
t6
10
ns min
CLOCK to LE setup time
t7
15
ns min
LE pulse width
1
Operating temperature is from 40°C to +85°C.
2
Operating temperature is from 40°C to +105°C.
05238-
002
CLK
DATA
DB23
(MSB)
DB22
DB2
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
LE
t2
t4
t5
t3
t7
t6
t1
Figure 2. Timing Diagram
相關(guān)PDF資料
PDF描述
V110A8H200BL3 CONVERTER MOD DC/DC 8V 200W
V110A8H200BG CONVERTER MOD DC/DC 8V 200W
VI-B7W-MY-F4 CONVERTER MOD DC/DC 5.5V 50W
VI-B7W-MY-F3 CONVERTER MOD DC/DC 5.5V 50W
MS27472E24F29S CONN RCPT 29POS WALL MT W/SCKT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADF4196 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Phase Noise, Fast Settling, 6 GHz
ADF4196BCPZ 制造商:Analog Devices 功能描述:IC PLL SYNTHESIZER 32LFCSP 制造商:Analog Devices 功能描述:IC, PLL SYNTHESIZER, 32LFCSP
ADF4196BCPZ-RL7 制造商:Analog Devices 功能描述:
ADF4206 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual RF PLL Frequency Synthesizers
ADF4206BRU 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 16-Pin TSSOP
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*