參數(shù)資料
型號: ADF4193WCCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 6/32頁
文件大小: 0K
描述: IC PLL FREQ SYNTHESIZER 32LFCSP
標(biāo)準(zhǔn)包裝: 1,500
類型: 時(shí)鐘/頻率合成器,RF
PLL:
輸入: CMOS,TTL
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:1
差分 - 輸入:輸出: 是/無
頻率 - 最大: 3.5GHz
除法器/乘法器: 是/是
電源電壓: 2.7 V ~ 3.3 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
ADF4193
Data Sheet
Rev. F | Page 14 of 32
REGISTER MAP
05328-
022
DB23
F5
DB22
F4
DB21
0
DB20
F2
DB19
F1
DB18
R4
DB17
R3
DB16
R2
DB15
R1
DB14
M12
DB13
M11
DB12
M10
DB11
M9
DB10
M8
DB9
M7
DB8
M6
DB7
M5
DB6
M4
DB5
M3
DB4
M2
DB3
M1
DB2
C3 (0)
DB1
C2 (0)
DB0
C1 (1)
DBB
4-BIT RF R
COUNTER
CP
ADJ
R
E
F/2
R
ESER
VED
PR
ESC
A
L
ER
DO
UBL
E
R
E
NABL
E
12-BIT MODULUS
CONTROL
BITS
MOD/R REGISTER (R1)
DB15
0
DB14
P12
DB13
P11
DB12
P10
DB11
P9
DB10
P8
DB9
P7
DB8
P6
DB7
P5
DB6
P4
DB5
P3
DB4
P2
DB3
P1
DB2
C3 (0)
DB1
C2 (1)
DB0
C1 (0)
DBB
R
ESER
VED
12-BIT PHASE
CONTROL
BITS
PHASE REGISTER (R2)
DB15
0
DB14
0
DB13
0
DB12
0
DB11
0
DB10
0
DB9
0
DB8
0
DB7
0
DB6
1
DB5
F3
DB4
1
DB3
F1
DB2
C3 (0)
DB1
C2 (1)
DB0
C1 (1)
PF
D
P
OLA
R
ITY
R
ESER
VED
CP
O
G
ND
RESERVED
CONTROL
BITS
FUNCTION REGISTER (R3)
DB15
M13
DB14
M12
DB13
M11
DB12
M10
DB11
0
DB10
0
DB9
0
DB8
0
DB7
0
DB6
M4
DB5
M3
DB4
M2
DB3
M1
DB2
C3 (1)
DB1
C2 (1)
DB0
C1 (0)
RESERVED
MUXOUT
CONTROL
BITS
SIGMA-DELTA
AND
LOCK DETECT MODES
MUX REGISTER (R6)
DB15
0
DB14
0
DB13
0
DB12
0
DB11
0
DB10
0
DB9
0
DB8
0
DB7
0
DB6
0
DB5
0
DB4
0
DB3
0
DB2
C3 (1)
DB1
C2 (1)
DB0
C1 (1)
RESERVED
CONTROL
BITS
TEST MODE REGISTER (R7)
DB7
F5
DB6
F4
DB5
F3
DB4
F2
DB3
F1
DB2
C3 (1)
DB1
C2 (0)
DB0
C1 (1)
CO
UNT
E
R
ESET
CP
3-
S
T
AT
E
PD
CHARG
E
PU
MP
PD
D
IFF
A
M
P
CONTROL
BITS
POWER-DOWN REGISTER (R5)
DB23
0
DB22
0
DB21
0
DB20
0
DB19
0
DB18
0
DB17
0
DB16
0
DB15
0
DB14
1
DB13
C9
DB12
C8
DB11
C7
DB10
C6
DB9
C5
DB8
C4
DB7
C3
DB6
C2
DB5
C1
DB4
F2
DB3
F1
DB2
C3 (1)
DB1
C2 (0)
DB0
C1 (0)
9-BIT TIMEOUT COUNTER
RESERVED
CONTROL
BITS
TIMER
SELECT
CHARGE PUMP REGISTER (R4)
DBB = DOUBLE BUFFERED BIT(S)
DB23
0
DB22
N8
DB21
N7
DB20
N6
DB19
N5
DB18
N4
DB17
N3
DB16
N2
DB15
N1
DB14
F12
DB13
F11
DB12
F10
DB11
F9
DB10
F8
DB9
F7
DB8
F6
DB7
F5
DB6
F4
DB5
F3
DB4
F2
DB3
F1
DB2
C3 (0)
DB1
C2 (0)
DB0
C1 (0)
8-BIT RF INT VALUE
12-BIT RF FRAC VALUE
CONTROL
BITS
FRAC/INT REGISTER (R0)
R
ESER
VED
Figure 28. Register Map
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