t
參數(shù)資料
型號: ADSP-2171BSZ-133
廠商: Analog Devices Inc
文件頁數(shù): 13/52頁
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 16BIT 128PQFP
標(biāo)準(zhǔn)包裝: 1
系列: ADSP-21xx
類型: 定點
接口: 主機(jī)接口,串行端口
時鐘速率: 33MHz
非易失內(nèi)存: 外部
芯片上RAM: 10kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-MQFP(14x20)
包裝: 托盤
REV. A
–20–
ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2171/ADSP-2172
Parameter
Min
Max
Unit
Interrupts and Flags
Timing Requirement:
tIFS
IRQx
or FI Setup before CLKOUT Low
1, 2, 3
0.25tCK + 15
ns
tIFH
IRQx
or FI Hold after CLKOUT High
1, 2, 3
0.25tCK
ns
Switching Characteristic:
tFOH
Flag Output Hold after CLKOUT Low
4
0.5tCK – 7
ns
tFOD
Flag Output Delay from CLKOUT Low
4
0.5tCK + 5
ns
NOTES
1If IRQx and FI inputs meet t
IFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)
2Edge-sensitive interrupts require pulse widths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3IRQx = IRQ0, IRQ1, and IRQ2.
4Flag Output = FL0, FL1, FL2, and FO.
CLKOUT
FLAG
OUTPUTS
IRQx
FI
t
IFS
t
FOD
t
FOH
t
IFH
Figure 9. Interrupts and Flags
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