REV. A
–38–
ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2173
Parameter
Min
Max
Unit
Serial Ports
Timing Requirement:
tSCK
SCLK Period
76.9
ns
tSCS
DR/TFS/RFS Setup before SCLK Low
8
ns
tSCH
DR/TFS/RFS Hold after SCLK Low
10
ns
tSCP
SCLKIN Width
28
ns
Switching Characteristic:
tCC
CLKOUT High to SCLKOUT
0.25tCK
0.25tCK + 15
ns
tSCDE
SCLK High to DT Enable
0
ns
tSCDV
SCLK High to DT Valid
20
ns
tRH
TFS/RFSOUT Hold after SCLK High
0
ns
tRD
TFS/RFSOUT Delay from SCLK High
20
ns
tSCDH
DT Hold after SCLK High
0
ns
tTDE
TFS(Alt) to DT Enable
0
ns
tTDV
TFS(Alt) to DT Valid
19
ns
tSCDD
SCLK High to DT Disable
25
ns
tRDV
RFS (Multichannel, Frame Delay Zero) to DT Valid
20
ns
CLKOUT
SCLK
TFS
RFS
DR
RFSIN
TFSIN
DT
ALTERNATE
FRAME MODE
t
CC
t
CC
t
SCK
t
SCP
t
SCP
t
SCS
t
SCH
t
RD
t
RH
RFSOUT
TFSOUT
t
SCDV
t
SCDE
t
SCDH
t
SCDD
t
TDE
t
TDV
t
RDV
MULTICHANNEL MODE,
FRAME DELAY 0
(MFD = 0)
Figure 29. Serial Ports