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參數(shù)資料
| 型號： | ADSP-BF535PKBZ-300 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 260 BGA |
| 產品培訓模塊： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 標準包裝： | 1 |
| 系列： | Blackfin® |
| 類型： | 定點 |
| 接口： | PCI，SPI，SSP，UART，USB |
| 時鐘速率： | 300MHz |
| 非易失內存： | 外部 |
| 芯片上RAM： | 308kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.50V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 260-BBGA |
| 供應商設備封裝： | 260-PBGA（19x19） |
| 包裝： | 托盤 |
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–15–
REV. A
ADSP-BF535
Microcontroller features, such as arbitrary bit and bit-
field manipulation, insertion, and extraction; integer
operations on 8-, 16-, and 32-bit data-types; and separate
user and kernel stack pointers.
Code density enhancements, which include intermixing
of 16- and 32-bit instructions (no mode switching, no
code segregation). Frequently used instructions are
encoded as 16-bits.
Development Tools
The ADSP-BF535 Blackfin processor is supported with a
complete set of software and hardware development tools,
including Analog Devices emulators and the VisualDSP++
development environment. The same emulator hardware that
supports other Analog Devices JTAG processors, also fully
emulates the ADSP-BF535 Blackfin processor.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an algebraic
syntax), an archiver (librarian/library builder), a linker, a loader,
a cycle-accurate instruction-level simulator, a C/C++ compiler,
and a C/C++ run-time library that includes DSP and mathemat-
ical functions. A key point for these tools is C/C++ code
efficiency. The compiler has been developed for efficient transla-
tion of C/C++ code to Blackfin processor assembly. The Blackfin
processor has architectural features that improve the efficiency of
compiled C/C++ code.
The VisualDSP++ debugger has a number of important features.
Data visualization is enhanced by a plotting package that offers
a significant level of flexibility. This graphical representation of
user data enables the programmer to quickly determine the per-
formance of an algorithm. As algorithms grow in complexity, this
capability can have increasing significance on the designer’s
development schedule, increasing productivity. Statistical
profiling enables the programmer to nonintrusively poll the
processor as it is running the program. This feature, unique to
VisualDSP++, enables the software developer to passively gather
important code execution metrics without interrupting the real-
time characteristics of the program. Essentially, the developer can
identify bottlenecks in software quickly and efficiently. By using
the profiler, the programmer can focus on those areas in the
program that impact performance and take corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
View mixed C/C++ and assembly code (interleaved
source and object information)
Insert breakpoints
Set conditional breakpoints on registers, memory, and
stacks
Trace instruction execution
View the internal pipeline to further optimize peripherals
Perform linear or statistical profiling of program
execution
Fill, dump, and graphically plot the contents of memory
Perform source level debugging
Create custom debugger windows
The VisualDSP++ IDDE lets programmers define and manage
software development. Its dialog boxes and property pages let
programmers configure and manage all development tools,
including color syntax highlighting in the VisualDSP++ editor.
These capabilities permit programmers to:
Control how the development tools process inputs and
generate outputs
Maintain a one-to-one correspondence with the tool’s
command line switches
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the memory
and timing constraints of embedded, real-time programming.
These capabilities enable engineers to develop code more effec-
tively, eliminating the need to start from the very beginning, when
developing new application code. The VDK features include
threads, critical and unscheduled regions, semaphores, events,
and device flags. The VDK also supports priority-based, preemp-
tive, cooperative, and time-sliced scheduling approaches. In
addition, the VDK was designed to be scalable. If the application
does not use a specific feature, the support code for that feature
is excluded from the target system.
Because the VDK is a library, a developer can decide whether to
use it or not. The VDK is integrated into the VisualDSP++ devel-
opment environment, but can also be used via standard
command line tools. When the VDK is used, the development
environment assists the developer with many error-prone tasks
and assists in managing system resources, automating the gener-
ation of various VDK based objects, and visualizing the system
state, when debugging an application that uses the VDK.
VCSE is Analog Devices technology for creating, using, and
reusing software components (independent modules of substan-
tial functionality) to quickly and reliably assemble software
applications. Download components from the Web and drop
them into the application. Publish component archives from
within VisualDSP++. VCSE supports component implementa-
tion in C/C++ or assembly language.
Use the Expert Linker to visually manipulate the placement of
code and data on the embedded system. View memory utilization
in a color-coded graphical form, easily move code and data to
different areas of the processor or external memory with the drag
of the mouse, examine run-time stack and heap usage. The
Expert Linker is fully compatible with existing Linker Definition
File (LDF), allowing the developer to move between the
graphical and textual environments.
Analog Devices emulators use the IEEE 1149.1 JTAG test access
port of the ADSP-BF535 Blackfin processor to monitor and
control the target board processor during emulation. The
emulator provides full speed emulation, allowing inspection and
modification of memory, registers, and processor stacks. Nonin-
trusively in-circuit emulation is assured by the use of the
processor’s JTAG interface—the emulator does not affect target
system loading or timing.
VisualDSP++ is a trademark of Analog Devices, Inc.
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| ADSP-BF535PKBZ-350 | 功能描述:IC DSP CONTROLLER 16BIT 260-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:Blackfin® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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| ADSP-BF536BBC-4A | 功能描述:IC DSP CTLR 16BIT 182CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:Blackfin® 標準包裝:2 系列:StarCore 類型:SC140 內核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
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| ADSP-BF536BBCZ-3AX | 制造商:Analog Devices 功能描述:182-MBGA PB-FREE - Trays |
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