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參數(shù)資料
| 型號： | ADV7183ABST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | LEAD FREE, MS-026-BEC, LQFP-80 |
| 文件頁數(shù)： | 24/104頁 |
| 文件大?。?/td> | 894K |
| 代理商： | ADV7183ABST |
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ADV7183A
Lock Related Controls (SDP)
Lock information is presented to the user through Bits [1:0] of
the Status 1 register. See the STATUS_1[7:0] Address 0x10, [7:0]
section. Figure 9 outlines the signal flow and the controls
available to influence the way the lock status information is
generated.
Rev. A | Page 24 of 104
SRLS Select Raw Lock Signal (SDP), Address 0x51, [6]
Using the SRLS bit, the user can choose between two sources for
determining the lock status (per Bits [1:0] in the Status 1
register).
The time_win signal is based on a line-to-line evaluation of
the horizontal synchronization pulse of the incoming
video. It reacts quite quickly.
The free_run signal evaluates the properties of the
incoming video over several fields, and takes vertical
synchronization information into account.
Table 40. SRLS Function
SRLS
Description
0*
Select the free_run signal.
1
Select the time_win signal.
*Default value.
FSCLE Fsc Lock Enable (SDP), Address 0x51, [7]
The FSCLE bit allows the user to choose whether the status of
the color subcarrier loop is taken into account when the overall
lock status is determined and presented via Bits [1:0] in Status
Register 1. This bit must be set to 0 when operating the SDP in
YPrPb component mode in order to generate a reliable HLOCK
status bit.
Table 41. FSCLE Function
FSCLE
Description
0
Overall lock status only dependent on horizontal
sync lock.
1*
Overall lock status dependent on horizontal sync
lock and Fsc Lock.
*Default value.
CIL[2:0] Count Into Lock (SDP), Address 0x51, [2:0]
CIL[2:0] determines the number of consecutive lines for which
the into lock condition must be true before the system switches
into the locked state, and reports this via Status 0 [1:0].
Table 42. CIL Function
CIL[2:0]
Description (Count Value in Lines of Video)
000
1
001
2
010
5
011
10
100*
100
101
500
110
1000
111
100000
*Default value.
COL[2:0] Count Out of Lock (SDP), Address 0x51, [5:3]
COL[2:0] determines the number of consecutive lines for which
the out of lock condition must be true before the system
switches into unlocked state, and reports this via Status 0 [1:0].
Table 43. COL Function
COL[2:0]
Description (Count Value in Lines of Video)
000
1
001
2
010
5
011
10
100*
100
101
500
110
1000
111
100000
*Default value.
0
1
0
TIME_WIN
FREE_RUN
STATUS 1 [0]
SELECT THE RAW LOCK SIGNAL
SRLS
FILTER THE RAW LOCK SIGNAL
CIL[2:0], COL[2:0]
TAKE F
SC
LOCK INTO ACCOUNT
FSCLE
STATUS 1 [1]
F
SC
LOCK
1
0
COUNTER INTO LOCK
COUNTER OUT OF LOCK
MEMORY
Figure 9. SDP Lock Related Signal Path
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| ADV7183AKST | Multiformat SDTV Video Decoder |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7183AKST | 制造商:Analog Devices 功能描述:MULTIFORMAT SDTV VIDEO DECODER 制造商:Rochester Electronics LLC 功能描述:10BIT NTSC/PAL/SECAMVIDDECOD I.C - Tape and Reel 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7183AKST-U1 | 制造商:Analog Devices 功能描述:VID DECODER 80LQFP - Bulk |
| ADV7183AKST-X2 | 制造商:Analog Devices 功能描述:VID DECODER - Bulk |
| ADV7183AXST | 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk |
| ADV7183AXST-X2 | 制造商:Analog Devices 功能描述:VIDEO DECODER I.C. - Bulk |
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