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ADV7183A
Example
Program the ADV7183A into manual fixed gain mode with a
desired gain of 0.89:
Rev. A | Page 34 of 104
Use Equation 1 to convert the gain:
0.89 × 2048 = 1822.72
Truncate to integer value:
1822.72 = 1822
Convert to hexadecimal:
1822
d
= 0x71E
Split into two registers and program:
Luma Gain Control 1 [3:0] = 0x7
Luma Gain Control 2 [7:0] = 0x1E
Enable Manual Fixed Gain Mode:
Set LAGC[2:0] to 000
BETACAM Enable Betacam Levels (SDP), Address 0x01, [5]
If YPrPb data is routed through the SDP core, the automatic
gain control modes can target different video input levels, as
outlined in Table 72. Please note that the BETACAM bit is valid
only if the input mode is YPrPb (component) and if the data is
routed through the SDP core. The BETACAM bit basically sets
the target value for AGC operation.
A review of the following sections is useful:
INSEL[3:0] Input Selection, Address 0x00, [3:0] to find how
component video (YPrPb) can be routed through the SDP
core.
Video Standard Selection (SDP) to select the various
standards (e.g., with and without pedestal)
The automatic gain control (AGC) algorithms adjust the levels
based on the setting of the BETACAM bit(see Table 68.).
Table 68. BETACAM Function
BETACAM
Description
0*
Assuming YPrPb is selected as input format.
Selecting PAL with pedestal selects MII.
Selecting PAL without pedestal selects SMPTE.
Selecting NTSC with pedestal selects MII.
Selecting NTSC without pedestal selects SMPTE.
1
Assuming YPrPb is selected as input format.
Selecting PAL with pedestal selects BETACAM.
Selecting PAL without pedestal selects BETACAM
variant.
Selecting NTSC with pedestal selects BETACAM.
Selecting NTSC without pedestal selects BETACAM
variant.
*Default value.
PW_UPD Peak White Update (SDP), Address 0x2B, [0]
The peak white and average video algorithms determine the
gain based on measurements taken from the active video. The
PW_UPD bit determines the rate of gain change. Please note
that the LAGC[2:0] must be set to the appropriate mode to
enable the peak white or average video mode in the first place.
For more information, refer to the LAGC[2:0] Luma Automatic
Gain Control (SDP), Address 0x30, [7:0] section.
Table 69. PW_UPD Function
PW_UPD
Description
0
Update gain once per video line.
1
Update gain once per field.
*Default value.
SDP Chroma Gain
CAGC[1:0] Chroma Automatic Gain Control (SDP),
Address 0x2C, [1:0]
The two bits of Color Automatic Gain Control mode select the
basic mode of operation for automatic gain control in the
chroma path.
Table 70. CAGC Function
CAGC[1:0]
Description
00
Manual fixed gain (use CMG[11:0]).
01
Use luma gain for chroma.
10*
Automatic gain (based on color burst).
11
Freeze chroma gain.
*Default value.
CAGT[1:0] Chroma Automatic Gain Timing (SDP),
Address 0x2D, [7:6]
The Chroma Automatic Gain Timing register allows the user to
influence the tracking speed of the chroma automatic gain
control. This register only has an effect if the CAGC[1:0]
register is set to 10 (automatic gain).
Table 71. CAGT Function
CAGT[1:0]
Description
00
Slow (TC = 2 sec)
01
Medium (TC = 1 sec)
10
Fast (TC = 0.2 sec)
11*
Adaptive
*Default value.