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參數(shù)資料
| 型號： | ADV7330KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat 11-Bit Triple DAC Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | PLASTIC, LEAD FREE, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 31/76頁 |
| 文件大小： | 1378K |
| 代理商： | ADV7330KST |
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REV. B
ADV7330
–31–
SD Real-Time Control, Subcarrier Reset, Timing Reset
[Subaddress 44h, Bit 2,1]
Together with the RTC_SCR_TR pin and SD Mode Register 3
[Address 44h, Bit 1,2], the ADV7330 can be used in timing
reset mode, subcarrier phase reset mode, or RTC mode.
A timing reset is achieved in a low-to-high transition on the
RTC_SCR_TR pin (Pin 31). In this state, the horizontal and
vertical counters will remain reset. On releasing this pin (set
to low), the internal counters will commence counting again,
the field count will start on Field 1, and the subcarrier phase
will also be reset.
The minimum time the pin has to be held high is one clock cycle;
otherwise, this reset signal might not be recognized. This timing
reset applies to the SD timing counters only.
In subcarrier phase reset, a low-to-high transition on the
RTC_SCR_TR pin (Pin 31) will reset the subcarrier phase to
zero on the field following the subcarrier phase reset when the
SD RTC/TR/SCR control bits at Address 44h are set to 01.
DISPLAY
NO TIMING RESET APPLIED
TIMING RESET APPLIED
START OF FIELD 4 OR 8
F
SC
PHASE = FIELD 4 OR 8
F
SC
PHASE = FIELD 1
TIMING RESET PULSE
307
310
307
1
2
3
4
5
6
7
21
313
320
DISPLAY
START OF FIELD 1
Figure 21. Timing Reset Timing Diagram
NO F
SC
RESET APPLIED
F
SC
PHASE = FIELD 4 OR 8
307
310
313
320
DISPLAY
START OF FIELD 4 OR 8
F
SC
RESET APPLIED
F
SC
RESET PULSE
F
SC
PHASE = FIELD 1
307
310
313
320
DISPLAY
START OF FIELD 4 OR 8
Figure 22. Subcarrier Reset Timing Diagram
This reset signal will have to be held high for a minimum of one
clock cycle.
Since the field counter is not reset, it is recommended that the
reset signal be applied in Field 7 [PAL] or Field 3 [NTSC]. The
reset of the phase will then occur on the next field, i.e., Field 1
being lined up correctly with the internal counters. The field count
register at Address 7Bh can be used to identify the number of
the active field.
In RTC mode, the ADV7330 can be used to lock to an external
video source. The real-time control mode allows the ADV7330
to automatically alter the subcarrier frequency to compensate for
line length variations. When the part is connected to a device that
outputs a digital data stream in the RTC format (such as an
ADV7183A video decoder, see Figure 23), the part will auto-
matically change to the compensated subcarrier frequency on a
line by line basis. This digital data stream is 67 bits wide and the
subcarrier is contained in Bits 0 to 21. Each bit is two clock cycles
long. 00h should be written into all four subcarrier frequency
registers when this mode is used.
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