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參數(shù)資料
| 型號： | ADV7330KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multiformat 11-Bit Triple DAC Video Encoder |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP64 |
| 封裝： | PLASTIC, LEAD FREE, MS-026BCD, LQFP-64 |
| 文件頁數(shù)： | 51/76頁 |
| 文件大?。?/td> | 1378K |
| 代理商： | ADV7330KST |
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REV. B
ADV7330
–51–
560
3
4
1
6.8pF
600
6.8pF
600
DAC
OUTPUT
75
BNC
OUTPUT
4.7 H
560
Figure 48. Example Output Filter for PS,
8
×
Oversampling
82pF
33pF
75
DAC OUTPUT
220nH
470nH
500
3
4
1
BNC OUTPUT
500
300
3
4
1
75
Figure 49. Example Output Filter for HDTV,
2
×
Oversampling
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
1M
10M
100M
1G
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
MAGNITUDE (dB)
GROUP DELAY (Sec)
PHASE (Deg)
G
320
240
160
80
0
–80
–160
–240
480
400
14n
12n
10n
8n
6n
4n
2n
0
18n
16n
Figure 50. Filter Plot for Output Filter for PS,
8
×
Oversampling
0
–50
–40
–30
–20
480
360
240
120
0
–120
–240
1G
18n
15n
12n
9n
6n
3n
0
–10
–60
1M
10M
100M
FREQUENCY (Hz)
CIRCUIT FREQUENCY RESPONSE
PHASE (Deg)
MAGNITUDE (dB)
G
GROUP DELAY (Sec)
Figure 51. Example for Output Filter HDTV,
2
×
Oversampling
PC BOARD LAYOUT CONSIDERATIONS
The ADV7330 is optimally designed for low noise performance,
both radiated and conducted noise. To complement the excellent
noise performance of the ADV7330, it is imperative that great
care be given to the PC board layout.
The layout should be optimized for lowest noise on the ADV7330
power and ground lines. This can be achieved by shielding the
digital inputs and providing good decoupling. The lead length
between groups of V
AA
and AGND, V
DD
and DGND, and
V
DD_IO
and GND_IO pins should be kept as short as possible to
minimized inductive ringing.
It is recommended that a 4-layer printed circuit board is used
with power and ground planes separating the layer of the signal
carrying traces of the components and solder-side layer. Com-
ponent placement should be carefully considered in order to
separate noisy circuits, such as crystal clocks, high speed logic
circuitry, and analog circuitry.
There should be a separate analog ground plane and a separate
digital ground plane.
Power planes should encompass a digital power plane and an
analog power plane. The analog power plane should contain the
DACs and all associated circuitry, V
REF
circuitry. The digital
power plane should contain all logic circuitry.
The analog and digital power planes should be individually con-
nected to the common power plane at one single point through a
suitable filtering device, such as a ferrite bead.
DAC output traces on a PCB should be treated as transmission
lines. It is recommended that the DACs be placed as close as
possible to the output connector, with the analog output traces
being as short as possible (less than 3 inches). The DAC termi-
nation resistors should be placed as close as possible to the
DAC outputs and should overlay the PCB’s ground plane. As
well as minimizing reflections, short analog output traces will
reduce noise pickup due to neighboring digital circuitry.
To avoid crosstalk between the DAC outputs, it is recommended
to leave as much space as possible between the tracks of the
individual DAC output pins. The addition of ground tracks
between outputs is also recommended.
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors.
Optimum performance is achieved by the use of 10 nF and 0.1
μ
F
ceramic capacitors. Each group of V
AA
, V
DD
, or V
DD_IO
pins
should be individually decoupled to ground. This should be
done by placing the capacitors as close as possible to the device
with the capacitor leads as short as possible, thus minimizing
lead inductance.
A 1
μ
F tantalum capacitor is recommended across the V
AA
supply
in addition to 10 nF ceramic capacitor. See Figure 52.
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