Revision 17 2-9 Power per I/O Pin Table 2-13 Summary of I/O Input Buffer Power (per pin) – Default I/O So" />
參數(shù)資料
型號: AGLN250V5-CSG81I
廠商: Microsemi SoC
文件頁數(shù): 69/150頁
文件大小: 0K
描述: IC FPGA NANO 1KB 250K 81-CSP
標準包裝: 640
系列: IGLOO nano
邏輯元件/單元數(shù): 6144
RAM 位總計: 36864
輸入/輸出數(shù): 60
門數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-WFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 81-CSP(5x5)
IGLOO nano Low Power Flash FPGAs
Revision 17
2-9
Power per I/O Pin
Table 2-13 Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings
Applicable to IGLOO nano I/O Banks
VCCI (V)
Dynamic Power
PAC9 (W/MHz) 1
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
3.3
16.38
3.3 V LVTTL / 3.3 V LVCMOS – Schmitt Trigger
3.3
18.89
3.3 V LVCMOS Wide Range2
3.3
16.38
3.3 V LVCMOS Wide Range – Schmitt Trigger
3.3
18.89
2.5 V LVCMOS
2.5
4.71
2.5 V LVCMOS – Schmitt Trigger
2.5
6.13
1.8 V LVCMOS
1.8
1.64
1.8 V LVCMOS – Schmitt Trigger
1.8
1.79
1.5 V LVCMOS (JESD8-11)
1.5
0.97
1.5 V LVCMOS (JESD8-11) – Schmitt Trigger
1.5
0.96
1.2 V LVCMOS3
1.2
0.57
1.2 V LVCMOS – Schmitt Trigger3
1.2
0.52
1.2 V LVCMOS Wide Range3
1.2
0.57
1.2 V LVCMOS Wide Range – Schmitt Trigger3
1.2
0.52
Notes:
1. PAC9 is the total dynamic power measured on VCCI.
2. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
3. Applicable to IGLOO nano V2 devices operating at VCCI
VCC.
Table 2-14 Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings1
Applicable to IGLOO nano I/O Banks
CLOAD (pF)
VCCI (V)
Dynamic Power
PAC10 (W/MHz)2
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
5
3.3
107.98
3.3 V LVCMOS Wide Range3
5
3.3
107.98
2.5 V LVCMOS
5
2.5
61.24
1.8 V LVCMOS
5
1.8
31.28
1.5 V LVCMOS (JESD8-11)
5
1.5
21.50
1.2 V LVCMOS4
51.2
15.22
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output slew.
2. PAC10 is the total dynamic power measured on VCCI.
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
4. Applicable for IGLOO nano V2 devices operating at VCCI
VCC.
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