2-20 Revision 17 Summary of I/O Timing Characteristics – Default I/O Software Settings Table" />
參數(shù)資料
型號: AGLN250V5-CSG81I
廠商: Microsemi SoC
文件頁數(shù): 81/150頁
文件大?。?/td> 0K
描述: IC FPGA NANO 1KB 250K 81-CSP
標(biāo)準(zhǔn)包裝: 640
系列: IGLOO nano
邏輯元件/單元數(shù): 6144
RAM 位總計: 36864
輸入/輸出數(shù): 60
門數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-WFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 81-CSP(5x5)
IGLOO nano DC and Switching Characteristics
2-20
Revision 17
Summary of I/O Timing Characteristics – Default I/O Software Settings
Table 2-23 Summary of AC Measuring Points
Standard
Measuring Trip Point (Vtrip)
3.3 V LVTTL / 3.3 V LVCMOS
1.4 V
3.3 V LVCMOS Wide Range
1.4 V
2.5 V LVCMOS
1.2 V
1.8 V LVCMOS
0.90 V
1.5 V LVCMOS
0.75 V
1.2 V LVCMOS
0.60 V
1.2 V LVCMOS Wide Range
0.60 V
Table 2-24 I/O AC Parameter Definitions
Parameter
Parameter Definition
tDP
Data to Pad delay through the Output Buffer
tPY
Pad to Data delay through the Input Buffer
tDOUT
Data to Output Buffer delay through the I/O interface
tEOUT
Enable to Output Buffer Tristate Control delay through the I/O interface
tDIN
Input Buffer to Data delay through the I/O interface
tHZ
Enable to Pad delay through the Output Buffer—HIGH to Z
tZH
Enable to Pad delay through the Output Buffer—Z to HIGH
tLZ
Enable to Pad delay through the Output Buffer—LOW to Z
tZL
Enable to Pad delay through the Output Buffer—Z to LOW
tZHS
Enable to Pad delay through the Output Buffer with delayed enable—Z to HIGH
tZLS
Enable to Pad delay through the Output Buffer with delayed enable—Z to LOW
相關(guān)PDF資料
PDF描述
AGLN250V5-ZCSG81I IC FPGA NANO 1KB 250K 81-CSP
AGL125V5-CSG196I IC FPGA 1KB FLASH 125K 196-CSP
AGL125V5-CS196I IC FPGA 1KB FLASH 125K 196-CSP
A3P060-2FG144I IC FPGA 1KB FLASH 60K 144-FBGA
ABM43DSEN-S13 CONN EDGECARD EXTEND 86POS .156
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLN250V5-DIELOT 制造商:Microsemi Corporation 功能描述:AGLN250V5-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:Microsemi SOC Products Group 功能描述:AGLN250V5-DIELOT - Gel-pak, waffle pack, wafer, diced wafer on film
AGLN250V5-QNG100 制造商:Microsemi Corporation 功能描述:FPGA IGLOO NANO FAMILY 250K GATES 130NM (CMOS) TECHNOLOGY 1. - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA IGLOO NANO FAMILY 250K GATES 130NM (CMOS) TECHNOLOGY 1. - Trays
AGLN250V5-QNG100I 制造商:Microsemi Corporation 功能描述:FPGA IGLOO NANO 250K GATES IND 130NM 1.5V 100QFN - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA IGLOO NANO 250K GATES IND 130NM 1.5V 100QFN - Trays
AGLN250V5-VQ100 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)
AGLN250V5-VQ100I 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)