Revision 17 III IGLOO nano Ordering Information Devices Not Recommended For New Designs AGLN015, AGLN030Z, AGLN06" />
參數(shù)資料
型號: AGLN250V5-CSG81I
廠商: Microsemi SoC
文件頁數(shù): 74/150頁
文件大?。?/td> 0K
描述: IC FPGA NANO 1KB 250K 81-CSP
標(biāo)準(zhǔn)包裝: 640
系列: IGLOO nano
邏輯元件/單元數(shù): 6144
RAM 位總計: 36864
輸入/輸出數(shù): 60
門數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 81-WFBGA,CSBGA
供應(yīng)商設(shè)備封裝: 81-CSP(5x5)
IGLOO nano Low Power Flash FPGAs
Revision 17
III
IGLOO nano Ordering Information
Devices Not Recommended For New Designs
AGLN015, AGLN030Z, AGLN060Z, AGLN125Z, and AGLN250Z are not recommended for new designs.
Device Marking
Microsemi normally topside marks the full ordering part number on each device. There are some exceptions to this, such as some of
the Z feature grade nano devices, the V2 designator for IGLOO devices, and packages where space is physically limited. Packages
that have limited characters available are UC36, UC81, CS81, QN48, QN68, and QFN132. On these specific packages, a subset of
the device marking will be used that includes the required legal information and as much of the part number as allowed by character
limitation of the device. In this case, devices will have a truncated device marking and may exclude the applications markings, such
as the I designator for Industrial Devices or the ES designator for Engineering Samples.
Notes:
1. Z-feature grade devices AGLN060Z, AGLN125Z, and AGLN250Z do not support the enhanced nano features of Schmitt Trigger
input, bus hold (hold previous I/O state in Flash*Freeze mode), cold-sparing, hot-swap I/O capability and 1.2 V programming.
The AGLN030 Z feature grade does not support Schmitt trigger input, bus hold and 1.2 V programming. For the VQ100, CS81,
UC81, QN68, and QN48 packages, the Z feature grade and the N part number are not marked on the device. Z feature grade
devices are not recommended for new designs.
2. AGLN030 is available in the Z feature grade only.
3. Marking Information: IGLOO nano V2 devices do not have a V2 marking, but IGLOO nano V5 devices are marked with a V5
designator.
AGLN010 = 10,000 System Gates
AGLN015 = 15,000 System Gates (AGLN015 is not recommended for new designs)
AGLN020 = 20,000 System Gates
AGLN030 = 30,000 System Gates
AGLN060 = 60,000 System Gates
AGLN125 = 125,000 System Gates
AGLN250 = 250,000 System Gates
Blank = Standard
Z = nano devices without enhanced features1
Supply Voltage
2 = 1.2 V to 1.5 V
5 = 1.5 V only
AGLN250
V2
Z
VQ
_
Part Number
IGLOO nano Devices
Package Type
VQ = Very Thin Quad Flat Pack (0.5 mm pitch)
DIELOT = Known Good Die
QN = Quad Flat Pack No Leads (0.4 mm and 0.5 mm pitches)
100
I
Y
Package Lead Count
G
Lead-Free Packaging
Application (Temperature Range)
Blank = Enhanced Commercial (
20°C to +85°C Junction Temperature)
I = Industrial (
40°C to +100°C Junction Temperature)
Blank = Standard Packaging
G= RoHS-Compliant Packaging
PP = Pre-Production
ES = Engineering Sample (Room Temperature Only)
CS = Chip Scale Package (0.5 mm pitch)
UC = Micro Chip Scale Package (0.4 mm pitch)
Security Feature
Y = Device Includes License to Implement IP Based on the
Cryptography Research, Inc. (CRI) Patent Portfolio
Blank = Device Does Not Include License to Implement IP Based
on the Cryptography Research, Inc. (CRI) Patent Portfolio
相關(guān)PDF資料
PDF描述
AGLN250V5-ZCSG81I IC FPGA NANO 1KB 250K 81-CSP
AGL125V5-CSG196I IC FPGA 1KB FLASH 125K 196-CSP
AGL125V5-CS196I IC FPGA 1KB FLASH 125K 196-CSP
A3P060-2FG144I IC FPGA 1KB FLASH 60K 144-FBGA
ABM43DSEN-S13 CONN EDGECARD EXTEND 86POS .156
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參數(shù)描述
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AGLN250V5-VQ100I 功能描述:IC FPGA NANO 1KB 250K 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:IGLOO nano 標(biāo)準(zhǔn)包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA,CSBGA 供應(yīng)商設(shè)備封裝:289-CSP(14x14)