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參數(shù)資料
| 型號： | AM79C976KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 132/309頁 |
| 文件大小： | 2070K |
| 代理商： | AM79C976KCW |
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132
Am79C976
8/01/00
P R E L I M I N A R Y
29
LEDPE
LED Program Enable. When LEDPE is set to 1, programming of the LED functions through BCR4,
BCR5, BCR6, and BCR7 is enabled. When LEDPE is cleared to 0, programming of LED functions
through these registers is disabled. Writes to these registers will be ignored. However, LEDPE does
not affect the programming of LED functions through the memory mapped LED registers, LED0,
LED1, LED2 and LED3. The memory-mapped LED registers are always enabled, regardless of the
state of LEDPE.
This bit is an alias of BCR2, bit 12. It is included only to allow programming from the EEPROM for
compatibility with legacy software.
28
DWIO
Double Word I/O. When set, this bit indicates that the Am79C976 controller is programmed for
DWord I/O (DWIO) mode. When cleared, this bit indicates that the Am79C976 controller is
programmed for Word I/O (WIO) mode. This bit affects the I/O Resource Offset map and it affects
the defined width of the Am79C976 controllers I/O resources. See the DWIO and WIO sections for
more details.
The initial value of the DWIO bit is determined by the programming of the EEPROM.
The value of DWIO can be altered automatically by the Am79C976 controller. Specifically, the
Am79C976 controller will set DWIO if it detects a DWord write access to offset 10h from the
Am79C976 controller I/O base address (corresponding to the RDP resource).
This bit is an alias of BCR18, bit 7. It is included only to allow programming from the EEPROM for
compatibility with legacy software.
27
APROMWE
Address PROM Write Enable. The Am79C976 controller contains a 16-byte shadow RAM on board
that emulates a small PROM that was used in conjunction with early AMD Ethernet controllers.
Accesses to Address PROM I/O space will be directed to this RAM. When APROMWE is set to 1,
then write access to the shadow RAM will be enabled.
This bit is an alias of BCR12, bit 8. It is included only to allow programming from the EEPROM for
compatibility with legacy software.
26-24
RES
Reserved locations. Written as zeros and read as undefined.
23
VAL2
Value bit for byte 2. The value of this bit is written to any bits in the CMD2 register that correspond
to bits in the CMD2[22:16] bit map field that are set to 1.
22-21
RES
Reserved locations. Written as zeros and read as undefined.
20
FDRPA
Full-Duplex Runt Packet Accept. When FDRPA is cleared to 0 and full-duplex mode is enabled, the
Am79C976 controller will only receive frames that meet the minimum Ethernet frame length of 64
bytes. Receive DMA will not start until at least 64 bytes or a complete frame have been received.
By default, FDRPA is cleared to 0. When FDRPA is set to 1, the Am79C976 controller will accept
any frame of 12 bytes or greater, and receive DMA will start according to the programming of the
receive FIFO watermark.
This bit is the inverse of BCR9, bit 2.
19
RPA
Runt Packet Accept. This bit forces the Am79C976 controller to accept runt packets (packets
shorter than 64 bytes). The minimum packet size that can be received is 12 bytes.
This bit is an alias of CSR124, bit 3.
18
DRCVPA
Disable Receive Physical Address. When set, the physical address detection (Station or node ID)
of the Am79C976 controller will be disabled. Frames addressed to the node
’
s individual physical
address will not be recognized.
This bit is an alias of CSR15, bit 13.
17
DRCVBC
Disable Receive Broadcast. When set, disables the Am79C976 controller from receiving broadcast
messages. Used for protocols that do not support broadcast addressing, except as a function of
multicast. DRCVBC is cleared by activation of H_RESET or S_RESET (broadcast messages will
be received) and is unaffected by STOP.
This bit is an alias of CSR15, bit 14.
16
PROM
Promiscuous Mode. When PROM = 1, all incoming receive frames are accepted, regardless of
their destination addresses.
This bit is an alias of CSR15, bit 15.
Bit
Name
Description
相關PDF資料 |
PDF描述 |
|---|---|
| AM79C978AKCW | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978AVCW | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C978 | Single-Chip 1/10 Mbps PCI Home Networking Controller |
| AM79C981 | Integrated Multiport Repeater Plus⑩ (IMR+⑩) |
| AM79C981JC | Integrated Multiport Repeater Plus⑩ (IMR+⑩) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C976KD | 制造商:Advanced Micro Devices 功能描述:ETHERNET:MEDIA ACCESS CONTROLLER (MAC) |
| AM79C976KF | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
| AM79C976KI | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
| AM79C976KIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| AM79C978 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
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