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參數(shù)資料
| 型號： | AM79C976KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| 中文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 26/309頁 |
| 文件大小： | 2070K |
| 代理商： | AM79C976KCW |
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Am79C976
8/01/00
P R E L I M I N A R Y
PME
Power Management Event Output, Open Drain
PME is an output that can be used to indicate that a
power management event (a Magic Packet, an OnNow
pattern match, or a change in link state) has been de-
tected. The PME pin is asserted when either:
1. PME_STATUS and PME_EN are both 1,
2. PME_EN_OVR and MPMAT are both 1, or
3. PME_EN_OVR and LCDET are both 1.
The PME signal is asynchronous with respect to the
PCI clock.
Board Interface
Note:
Before programming the LED pins, see the de-
scription of LEDPE in BCR2, bit 12.
LED0
LED0
This output is designed to directly drive an LED. By de-
fault, LED0 indicates an active link connection. This pin
can also be programmed to indicate other network sta-
tus (see BCR4). The LED0 pin polarity is programma-
ble, but by default it is active LOW. When the LED0 pin
polarity is programmed to active LOW, the output is an
open drain driver. When the LED0 pin polarity is pro-
grammed to active HIGH, the output is a totem pole
driver.
Output
Note:
The LED0 pin is multiplexed with the EEDI pin.
LED1
LED1
This output is designed to directly drive an LED. By de-
fault, LED1 indicates receive or transmit activity on the
network. This pin can also be programmed to indicate
other network status (see BCR5). The LED1 pin polar-
ity is programmable, but by default, it is active LOW.
When the LED1 pin polarity is programmed to active
LOW, the output is an open drain driver. When the
LED1 pin polarity is programmed to active HIGH, the
output is a totem pole driver.
Output
Note:
The LED1 pin is multiplexed with the EESK pin.
LED2
LED2
This output is designed to directly drive an LED. By de-
fault, LED2 indicates that the network bit rate is 100
Mb/s. This pin can also be programmed to indicate var-
ious network status (see BCR6). The LED2 pin polarity
is programmable, but by default it is active LOW. When
the LED2 pin polarity is programmed to active LOW, the
output is an open drain driver. When the LED2 pin po-
larity is programmed to active HIGH, the output is a
totem pole driver.
Output
Note:
The LED2 pin is multiplexed with the RXFRTGE
pin.
LED3
LED3
This output is designed to directly drive an LED. By de-
fault, LED3 indicates that a collision has occurred. This
pin can also be programmed to indicate other network
status (see BCR7). The LED3 pin polarity is program-
mable, but by default it is active LOW. When the LED3
pin polarity is programmed to active LOW, the output is
an open drain driver. When the LED3 pin polarity is pro-
grammed to active HIGH, the output is a totem pole
driver.
Output
Special attention must be given to the external circuitry
attached to this pin. When this pin is used to drive an
LED while an EEPROM is used in the system, then
buffering may be required between the LED3 pin and
the LED circuit. If an LED circuit were directly attached
to this pin, it may create an I
OL
requirement that could
not be met by the serial EEPROM attached to this pin.
If no EEPROM is included in the system design or low
current LEDs are used, then the LED3 signal may be
directly connected to an LED without buffering. In any
case, if an EEPROM is present, there must be a pull-up
resistor connected to this pin (10 k
quate). For more details regarding LED connection,
see the section on
LED Support
.
should be ade-
Note:
The LED3 pin is multiplexed with the EEDO and
RXFRTGD pins.
PG
Power Good
The PG pin has two functions: (1) it puts the device into
Magic Packet mode, and (2) it blocks any resets when
the PCI bus power is off.
Input
When PG is LOW and either MPPEN or MPMODE is
set to 1, the device enters the Magic Packet mode.
When PG is LOW, a LOW assertion of the PCI RST pin
will only cause the PCI interface pins (except for PME)
to be put in the high impedance state. The internal logic
will ignore the assertion of RST.
When PG is HIGH, assertion of the PCI RST pin
causes the controller logic to be reset and the configu-
ration information to be loaded from the EEPROM.
RWU
Remote Wake Up
RWU is an output that is asserted either when the con-
troller is in the Magic Packet mode and a Magic Packet
frame has been detected, or the controller is in the Link
Change Detect mode and a Link Change has been de-
tected.
Output
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C976KD | 制造商:Advanced Micro Devices 功能描述:ETHERNET:MEDIA ACCESS CONTROLLER (MAC) |
| AM79C976KF | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
| AM79C976KI | 制造商:Advanced Micro Devices 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP 制造商:AMD (Advanced Micro Devices) 功能描述:Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 208-Pin PQFP |
| AM79C976KIW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PRO⑩ 10/100 Mbps PCI Ethernet Controller |
| AM79C978 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller |
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