
188
Am79C976
8/01/00
P R E L I M I N A R Y
Read/Write accessible. These
bits are unaffected by H_RESET,
S_RESET, or STOP.
-",
Bit
Name
Description
31-0
RES
Reserved locations. Written as
zeros and read as undefined.
"/!0
Bit
Name
Description
31-16
RES
Reserved locations. Written as
zeros and read as undefined.
15-0
TXPOLLINT
Transmit Polling Interval. This
register contains the time that the
Am79C976 controller will wait be-
tween successive polling opera-
tions. The TXPOLLINT value is
expressed as the two
’
s comple-
ment of the desired interval,
where each bit of TXPOLLINT
represents 1 PCI clock period.
TXPOLLINT[3:0] are ignored.
(TXPOLLINT[16] is implied to be
a one, so TXPOLLINT[15] is sig-
nificant and does not represent
the sign of the two
’
s complement
TXPOLLINT value.)
The default value of this register
is 0000h. This corresponds to a
polling interval of 65,536 clock
periods
(1.966
CLK = 33 MHz).
ms
when
Setting the INIT bit starts an ini-
tialization process that sets TX-
POLLINT to its default value. If
the user wants to program a val-
ue for TXPOLLINT other than the
default, then he must change the
value after the initialization se-
quence has completed.
If the user does
not
use the initial-
ization block to initialize the
Am79C976 device, but instead,
chooses to write directly to each
of the registers that are involved
in the INIT operation, then it is im-
perative that the user also writes
an acceptable value to CSR47 as
part of the alternative initialization
sequence.
Read/Write accessible. These
bits are unaffected by H_RESET,
S_RESET, or STOP.
"1
Bit
Name
Description
31-0
RES
Reserved locations. Written as
zeros and read as undefined.
"2+0
Bit
Name
Description
31-16
RES
Reserved locations. Written as
zeros and read as undefined.
15-0
CHPOLLINT Chain Polling Interval. This regis-
ter contains the time that the
Am79C976 controller will wait be-
tween successive polling opera-
tions
when
Management Unit is in the middle
of a buffer chaining operation.
The CHPOLLINT value is ex-
pressed as the two
’
s complement
of the desired interval, where
each bit of CHPOLLINT approxi-
mately represents one PCI clock
time period. CHPOLLINT[3:0] are
ignored. (CHPOLLINT[16] is im-
plied to be a 1, so CHPOL-
LINT[15] is significant and does
not represent the sign of the two
’
s
complement CHPOLLINT value.)
the
Buffer
The default value of this register
is 0000h. This corresponds to a
polling interval of 65,536 clock
periods
(1.966
CLK = 33 MHz).
ms
when
Setting the INIT bit starts an ini-
tialization process that sets
CHPOLLINT to its default value.
If the user wants to program a
value for CHPOLLINT other than
the default, then he must change
the value after the initialization
sequence has completed.
If the user does
not
use the initial-
ization block to initialize the
Am79C976 device, but instead,
chooses to write directly to each
of the registers that are involved
in the INIT operation, then it is im-
perative that the user also writes
an acceptable value to CSR49 as