參數(shù)資料
型號(hào): AT89LP52-20AU
廠商: Atmel
文件頁數(shù): 52/117頁
文件大小: 0K
描述: IC MCU 8051 8K FLASH SPI 44TQFP
標(biāo)準(zhǔn)包裝: 160
系列: 89LP
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 36
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
4
3709D–MICRO–12/11
AT89LP51/52
1.5
Pin Description
Table 1-1.
AT89LP51/52 Pin Description
Pin Number
Symbol
Type
Description
TQFP
PLCC
PDIP
VQFN
1761
P1.5
I/O
P1.5: I/O Port 1 bit 5.
MOSI: SPI master-out/slave-in. In UART SPI mode this pin is an output. During In-
System Programming, this pin is an input.
2
8
72
P1.6
I/O
P1.6: I/O Port 1 bit 6.
MISO: SPI master-in/slave-out. In UART SPI mode this pin is an input. During In-
System Programming, this pin is an output.
39
8
3P1.7
I/O
P1.7: I/O Port 1 bit 7.
SCK: SPI Clock. In UART SPI mode this pin is an output. During In-System
Programming, this pin is an input.
4109
4
RST
I/O
RST: External Reset input (Reset polarity depends on POL pin. See “External Reset”
on page 33.). The RST pin can output a pulse when the internal Watchdog reset is
active.
511
105
P3.0
I/O
I
P3.0: I/O Port 3 bit 0.
RXD: Serial Port Receiver Input.
6
12
6
NC
Not internally connected
713
117
P3.1
I/O
O
P3.1: I/O Port 3 bit 1.
TXD: Serial Port Transmitter Output.
8
14
12
8
P3.2
I/O
I
P3.2: I/O Port 3 bit 2.
INT0: External Interrupt 0 Input or Timer 0 Gate Input.
915
139
P3.3
I/O
I
P3.3: I/O Port 3 bit 3.
INT1: External Interrupt 1 Input or Timer 1 Gate Input
10
16
14
10
P3.4
I/O
P3.4: I/O Port 3 bit 4.
T1: Timer/Counter 0 External input or output.
11
17
15
1
P3.5
I/O
P3.5: I/O Port 3 bit 5.
T1: Timer/Counter 1 External input or output.
12
18
16
12
P3.6
I/O
O
P3.6: I/O Port 3 bit 6.
WR: External memory interface Write Strobe (active-low).
13
19
17
13
P3.7
I/O
O
P3.7: I/O Port 3 bit 7.
RD: External memory interface Read Strobe (active-low).
14
20
18
14
P4.7
I/O
O
P4.7: I/O Port 4 bit 7.
XTAL2: Output from inverting oscillator amplifier. It may be used as a port pin if the
internal RC oscillator or external clock is selected as the clock source.
15
21
19
15
P4.6
I/O
I
P4.6: I/O Port 4 bit 6.
XTAL1: Input to the inverting oscillator amplifier and internal clock generation circuits.
It may be used as a port pin if the internal RC oscillator is selected as the clock
source.
16
22
20
16
GND
I
Ground
17
23
17
NC
Not internally connected
18
24
21
18
P2.0
I/O
O
P2.0: I/O Port 2 bit 0.
A8: External memory interface Address bit 8.
19
25
22
19
P2.1
I/O
O
P2.1: I/O Port 2 bit 1.
A9: External memory interface Address bit 9.
20
26
23
20
P2.1
I/O
O
P2.2: I/O Port 2 bit 2.
A10: External memory interface Address bit 10.
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